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Commit 9288d74f authored by José Roberto de Souza's avatar José Roberto de Souza Committed by Lucas De Marchi
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drm/i915/tgl: Move transcoders to pipes' powerwells 



When trying to read registers from transcoder C and D while PG3 is ON it
causes unclaimed access warnings. Adding the powerwells for the pipes
fixes the issue, but doesn't match the spec.

Signed-off-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: default avatarImre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190817093902.2171-4-lucas.demarchi@intel.com
parent 465242ee

drivers/gpu/drm/i915/display/intel_display_power.c

+2 −2
Original line number Diff line number Diff line
@@ -2549,12 +2549,14 @@ void intel_display_power_put(struct drm_i915_private *dev_priv, 


#define TGL_PW_5_POWER_DOMAINS (			\

	BIT_ULL(POWER_DOMAIN_PIPE_D) |			\

	BIT_ULL(POWER_DOMAIN_TRANSCODER_D) |		\

	BIT_ULL(POWER_DOMAIN_PIPE_D_PANEL_FITTER) |     \

	BIT_ULL(POWER_DOMAIN_INIT))



#define TGL_PW_4_POWER_DOMAINS (			\

	TGL_PW_5_POWER_DOMAINS |			\

	BIT_ULL(POWER_DOMAIN_PIPE_C) |			\

	BIT_ULL(POWER_DOMAIN_TRANSCODER_C) |		\

	BIT_ULL(POWER_DOMAIN_PIPE_C_PANEL_FITTER) |	\

	BIT_ULL(POWER_DOMAIN_INIT))
@@ -2562,8 +2564,6 @@ void intel_display_power_put(struct drm_i915_private *dev_priv, 
	TGL_PW_4_POWER_DOMAINS |			\

	BIT_ULL(POWER_DOMAIN_PIPE_B) |			\

	BIT_ULL(POWER_DOMAIN_TRANSCODER_B) |		\

	BIT_ULL(POWER_DOMAIN_TRANSCODER_C) |		\

	BIT_ULL(POWER_DOMAIN_TRANSCODER_D) |		\

	BIT_ULL(POWER_DOMAIN_PIPE_B_PANEL_FITTER) |	\

	BIT_ULL(POWER_DOMAIN_PORT_DDI_TC1_LANES) |	\

	BIT_ULL(POWER_DOMAIN_PORT_DDI_TC2_LANES) |	\