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Commit 927d2c21 authored by Ingo Molnar's avatar Ingo Molnar
Browse files

Merge branch 'linus' into perf/core, to pick up fixes 



Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parents cf31b7dd ac9a4090

Documentation/fb/efifb.txt

+6 −0
Original line number Diff line number Diff line
@@ -27,5 +27,11 @@ You have to add the following kernel parameters in your elilo.conf: 
	Macbook Pro 17", iMac 20" :

		video=efifb:i20



Accepted options:



nowc	Don't map the framebuffer write combined. This can be used

	to workaround side-effects and slowdowns on other CPU cores

	when large amounts of console data are written.



--

Edgar Hucek <gimli@dark-green.com>

MAINTAINERS

+1 −0
Original line number Diff line number Diff line
@@ -14004,6 +14004,7 @@ F: drivers/block/virtio_blk.c 
F:	include/linux/virtio*.h

F:	include/uapi/linux/virtio_*.h

F:	drivers/crypto/virtio/

F:	mm/balloon_compaction.c



VIRTIO CRYPTO DRIVER

M:	Gonglei <arei.gonglei@huawei.com>

Makefile

+1 −1
Original line number Diff line number Diff line 
VERSION = 4

PATCHLEVEL = 13

SUBLEVEL = 0

EXTRAVERSION = -rc4

EXTRAVERSION = -rc5

NAME = Fearless Coyote



# *DOCUMENTATION*

arch/arm/include/asm/tlb.h

+9 −2
Original line number Diff line number Diff line
@@ -148,7 +148,8 @@ static inline void tlb_flush_mmu(struct mmu_gather *tlb) 
}



static inline void

tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm, unsigned long start, unsigned long end)

arch_tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm,

			unsigned long start, unsigned long end)

{

	tlb->mm = mm;

	tlb->fullmm = !(start | (end+1));
@@ -166,8 +167,14 @@ tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm, unsigned long start 
}



static inline void

tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)

arch_tlb_finish_mmu(struct mmu_gather *tlb,

			unsigned long start, unsigned long end, bool force)

{

	if (force) {

		tlb->range_start = start;

		tlb->range_end = end;

	}



	tlb_flush_mmu(tlb);



	/* keep the page table cache within bounds */

arch/ia64/include/asm/tlb.h

+6 −2
Original line number Diff line number Diff line
@@ -168,7 +168,8 @@ static inline void __tlb_alloc_page(struct mmu_gather *tlb) 




static inline void

tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm, unsigned long start, unsigned long end)

arch_tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm,

			unsigned long start, unsigned long end)

{

	tlb->mm = mm;

	tlb->max = ARRAY_SIZE(tlb->local);
@@ -185,8 +186,11 @@ tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm, unsigned long start 
 * collected.

 */

static inline void

tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)

arch_tlb_finish_mmu(struct mmu_gather *tlb,

			unsigned long start, unsigned long end, bool force)

{

	if (force)

		tlb->need_flush = 1;

	/*

	 * Note: tlb->nr may be 0 at this point, so we can't rely on tlb->start_addr and

	 * tlb->end_addr.