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Commit 914a4fd8 authored by Imre Deak's avatar Imre Deak
Browse files

drm/i915/gen9+: Fix initial readout for Y tiled framebuffers 



If BIOS configured a Y tiled FB we failed to set up the backing object
tiling accordingly, leading to a lack of GT fence installed and a
garbled console.

The problem was bisected to
commit 011f22eb ("drm/i915: Do NOT skip the first 4k of stolen memory for pre-allocated buffers v2")
but it just revealed a pre-existing issue.

Kudos to Ville who suspected a missing fence looking at the corruption
on the screen.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: <ronald@innovation.ch>
Cc: <stable@vger.kernel.org>
Reported-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
Reported-by: default avatar <ronald@innovation.ch>
Tested-by: default avatar <ronald@innovation.ch>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108264


Fixes: bc8d7dff ("drm/i915/skl: Provide a Skylake version of get_plane_config()")
Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181016160011.28347-1-imre.deak@intel.com
parent ad52fcc9

drivers/gpu/drm/i915/intel_display.c

+23 −2
Original line number Diff line number Diff line
@@ -2673,6 +2673,17 @@ intel_alloc_initial_plane_obj(struct intel_crtc *crtc, 
	if (size_aligned * 2 > dev_priv->stolen_usable_size)

		return false;



	switch (fb->modifier) {

	case DRM_FORMAT_MOD_LINEAR:

	case I915_FORMAT_MOD_X_TILED:

	case I915_FORMAT_MOD_Y_TILED:

		break;

	default:

		DRM_DEBUG_DRIVER("Unsupported modifier for initial FB: 0x%llx\n",

				 fb->modifier);

		return false;

	}



	mutex_lock(&dev->struct_mutex);

	obj = i915_gem_object_create_stolen_for_preallocated(dev_priv,

							     base_aligned,
@@ -2682,8 +2693,17 @@ intel_alloc_initial_plane_obj(struct intel_crtc *crtc, 
	if (!obj)

		return false;



	if (plane_config->tiling == I915_TILING_X)

		obj->tiling_and_stride = fb->pitches[0] | I915_TILING_X;

	switch (plane_config->tiling) {

	case I915_TILING_NONE:

		break;

	case I915_TILING_X:

	case I915_TILING_Y:

		obj->tiling_and_stride = fb->pitches[0] | plane_config->tiling;

		break;

	default:

		MISSING_CASE(plane_config->tiling);

		return false;

	}



	mode_cmd.pixel_format = fb->format->format;

	mode_cmd.width = fb->width;
@@ -8837,6 +8857,7 @@ skylake_get_initial_plane_config(struct intel_crtc *crtc, 
		fb->modifier = I915_FORMAT_MOD_X_TILED;

		break;

	case PLANE_CTL_TILED_Y:

		plane_config->tiling = I915_TILING_Y;

		if (val & PLANE_CTL_RENDER_DECOMPRESSION_ENABLE)

			fb->modifier = I915_FORMAT_MOD_Y_TILED_CCS;

		else