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Commit 912532ae authored by Shawn Guo's avatar Shawn Guo
Browse files

ARM: imx5: remove imx51 non-DT support files 



Since i.MX51 becomes a DT only platform, those non-DT support files can
be removed now.

Signed-off-by: default avatarShawn Guo <shawn.guo@freescale.com>
parent 1ecdde9d

arch/arm/mach-imx/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -12,7 +12,7 @@ obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o clk-imx31.o iomux-imx31.o ehci- 
obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o clk-imx35.o ehci-imx35.o pm-imx3.o



imx5-pm-$(CONFIG_PM) += pm-imx5.o

obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clk-imx51-imx53.o ehci-imx5.o $(imx5-pm-y)

obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clk-imx51-imx53.o $(imx5-pm-y)



obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-gate2.o \

			    clk-pfd.o clk-busy.o clk.o \

arch/arm/mach-imx/devices-imx51.h

deleted100644 → 0
+0 −66
Original line number Diff line number Diff line 
/*

 * Copyright (C) 2010 Pengutronix

 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>

 *

 * This program is free software; you can redistribute it and/or modify it under

 * the terms of the GNU General Public License version 2 as published by the

 * Free Software Foundation.

 */

#include "devices/devices-common.h"



extern const struct imx_fec_data imx51_fec_data;

#define imx51_add_fec(pdata)	\

	imx_add_fec(&imx51_fec_data, pdata)



extern const struct imx_fsl_usb2_udc_data imx51_fsl_usb2_udc_data;

#define imx51_add_fsl_usb2_udc(pdata)	\

	imx_add_fsl_usb2_udc(&imx51_fsl_usb2_udc_data, pdata)



extern const struct imx_imx_i2c_data imx51_imx_i2c_data[];

#define imx51_add_imx_i2c(id, pdata)	\

	imx_add_imx_i2c(&imx51_imx_i2c_data[id], pdata)

#define imx51_add_hsi2c(pdata)	\

	imx51_add_imx_i2c(2, pdata)



extern const struct imx_imx_ssi_data imx51_imx_ssi_data[];

#define imx51_add_imx_ssi(id, pdata)	\

	imx_add_imx_ssi(&imx51_imx_ssi_data[id], pdata)



extern const struct imx_imx_uart_1irq_data imx51_imx_uart_data[];

#define imx51_add_imx_uart(id, pdata)	\

	imx_add_imx_uart_1irq(&imx51_imx_uart_data[id], pdata)



extern const struct imx_mxc_ehci_data imx51_mxc_ehci_otg_data;

#define imx51_add_mxc_ehci_otg(pdata)	\

	imx_add_mxc_ehci(&imx51_mxc_ehci_otg_data, pdata)

extern const struct imx_mxc_ehci_data imx51_mxc_ehci_hs_data[];

#define imx51_add_mxc_ehci_hs(id, pdata)	\

	imx_add_mxc_ehci(&imx51_mxc_ehci_hs_data[id - 1], pdata)



extern const struct imx_mxc_nand_data imx51_mxc_nand_data;

#define imx51_add_mxc_nand(pdata)	\

	imx_add_mxc_nand(&imx51_mxc_nand_data, pdata)



extern const struct imx_sdhci_esdhc_imx_data imx51_sdhci_esdhc_imx_data[];

#define imx51_add_sdhci_esdhc_imx(id, pdata)	\

	imx_add_sdhci_esdhc_imx(&imx51_sdhci_esdhc_imx_data[id], pdata)



extern const struct imx_spi_imx_data imx51_cspi_data;

#define imx51_add_cspi(pdata)	\

	imx_add_spi_imx(&imx51_cspi_data, pdata)



extern const struct imx_spi_imx_data imx51_ecspi_data[];

#define imx51_add_ecspi(id, pdata)	\

	imx_add_spi_imx(&imx51_ecspi_data[id], pdata)



extern const struct imx_imx2_wdt_data imx51_imx2_wdt_data[];

#define imx51_add_imx2_wdt(id)	\

	imx_add_imx2_wdt(&imx51_imx2_wdt_data[id])



extern const struct imx_imx_keypad_data imx51_imx_keypad_data;

#define imx51_add_imx_keypad(pdata)	\

	imx_add_imx_keypad(&imx51_imx_keypad_data, pdata)



extern const struct imx_pata_imx_data imx51_pata_imx_data;

#define imx51_add_pata_imx() \

	imx_add_pata_imx(&imx51_pata_imx_data)

arch/arm/mach-imx/ehci-imx5.c

deleted100644 → 0
+0 −172
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>

 * Copyright (C) 2010 Freescale Semiconductor, Inc.

 *

 * This program is free software; you can redistribute it and/or modify it

 * under the terms of the GNU General Public License as published by the

 * Free Software Foundation; either version 2 of the License, or (at your

 * option) any later version.

 *

 * This program is distributed in the hope that it will be useful, but

 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY

 * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

 * for more details.

 */



#include <linux/platform_device.h>

#include <linux/io.h>

#include <linux/platform_data/usb-ehci-mxc.h>



#include "ehci.h"

#include "hardware.h"



#define MXC_OTG_OFFSET			0

#define MXC_H1_OFFSET			0x200

#define MXC_H2_OFFSET			0x400



/* USB_CTRL */

#define MXC_OTG_UCTRL_OWIE_BIT		(1 << 27)	/* OTG wakeup intr enable */

#define MXC_OTG_UCTRL_OPM_BIT		(1 << 24)	/* OTG power mask */

#define MXC_H1_UCTRL_H1UIE_BIT		(1 << 12)	/* Host1 ULPI interrupt enable */

#define MXC_H1_UCTRL_H1WIE_BIT		(1 << 11)	/* HOST1 wakeup intr enable */

#define MXC_H1_UCTRL_H1PM_BIT		(1 <<  8)	/* HOST1 power mask */



/* USB_PHY_CTRL_FUNC */

#define MXC_OTG_PHYCTRL_OC_POL_BIT	(1 << 9)	/* OTG Polarity of Overcurrent */

#define MXC_OTG_PHYCTRL_OC_DIS_BIT	(1 << 8)	/* OTG Disable Overcurrent Event */

#define MXC_H1_OC_POL_BIT		(1 << 6)	/* UH1 Polarity of Overcurrent */

#define MXC_H1_OC_DIS_BIT		(1 << 5)	/* UH1 Disable Overcurrent Event */

#define MXC_OTG_PHYCTRL_PWR_POL_BIT	(1 << 3)	/* OTG Power Pin Polarity */



/* USBH2CTRL */

#define MXC_H2_UCTRL_H2UIE_BIT		(1 << 8)

#define MXC_H2_UCTRL_H2WIE_BIT		(1 << 7)

#define MXC_H2_UCTRL_H2PM_BIT		(1 << 4)



#define MXC_USBCMD_OFFSET		0x140



/* USBCMD */

#define MXC_UCMD_ITC_NO_THRESHOLD_MASK	(~(0xff << 16))	/* Interrupt Threshold Control */



int mx51_initialize_usb_hw(int port, unsigned int flags)

{

	unsigned int v;

	void __iomem *usb_base;

	void __iomem *usbotg_base;

	void __iomem *usbother_base;

	int ret = 0;



	usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);

	if (!usb_base) {

		printk(KERN_ERR "%s(): ioremap failed\n", __func__);

		return -ENOMEM;

	}



	switch (port) {

	case 0:	/* OTG port */

		usbotg_base = usb_base + MXC_OTG_OFFSET;

		break;

	case 1:	/* Host 1 port */

		usbotg_base = usb_base + MXC_H1_OFFSET;

		break;

	case 2: /* Host 2 port */

		usbotg_base = usb_base + MXC_H2_OFFSET;

		break;

	default:

		printk(KERN_ERR"%s no such port %d\n", __func__, port);

		ret = -ENOENT;

		goto error;

	}

	usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;



	switch (port) {

	case 0:	/*OTG port */

		if (flags & MXC_EHCI_INTERNAL_PHY) {

			v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC_OFFSET);



			if (flags & MXC_EHCI_OC_PIN_ACTIVE_LOW)

				v |= MXC_OTG_PHYCTRL_OC_POL_BIT;

			else

				v &= ~MXC_OTG_PHYCTRL_OC_POL_BIT;

			if (flags & MXC_EHCI_POWER_PINS_ENABLED) {

				/* OC/USBPWR is used */

				v &= ~MXC_OTG_PHYCTRL_OC_DIS_BIT;

			} else {

				/* OC/USBPWR is not used */

				v |= MXC_OTG_PHYCTRL_OC_DIS_BIT;

			}

			if (flags & MXC_EHCI_PWR_PIN_ACTIVE_HIGH)

				v |= MXC_OTG_PHYCTRL_PWR_POL_BIT;

			else

				v &= ~MXC_OTG_PHYCTRL_PWR_POL_BIT;

			__raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC_OFFSET);



			v = __raw_readl(usbother_base + MXC_USBCTRL_OFFSET);

			if (flags & MXC_EHCI_WAKEUP_ENABLED)

				v |= MXC_OTG_UCTRL_OWIE_BIT;/* OTG wakeup enable */

			else

				v &= ~MXC_OTG_UCTRL_OWIE_BIT;/* OTG wakeup disable */

			if (flags & MXC_EHCI_POWER_PINS_ENABLED)

				v &= ~MXC_OTG_UCTRL_OPM_BIT;

			else

				v |= MXC_OTG_UCTRL_OPM_BIT;

			__raw_writel(v, usbother_base + MXC_USBCTRL_OFFSET);

		}

		break;

	case 1:	/* Host 1 */

		/*Host ULPI */

		v = __raw_readl(usbother_base + MXC_USBCTRL_OFFSET);

		if (flags & MXC_EHCI_WAKEUP_ENABLED) {

			/* HOST1 wakeup/ULPI intr enable */

			v |= (MXC_H1_UCTRL_H1WIE_BIT | MXC_H1_UCTRL_H1UIE_BIT);

		} else {

			/* HOST1 wakeup/ULPI intr disable */

			v &= ~(MXC_H1_UCTRL_H1WIE_BIT | MXC_H1_UCTRL_H1UIE_BIT);

		}



		if (flags & MXC_EHCI_POWER_PINS_ENABLED)

			v &= ~MXC_H1_UCTRL_H1PM_BIT; /* HOST1 power mask unused*/

		else

			v |= MXC_H1_UCTRL_H1PM_BIT; /* HOST1 power mask used*/

		__raw_writel(v, usbother_base + MXC_USBCTRL_OFFSET);



		v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC_OFFSET);

		if (flags & MXC_EHCI_OC_PIN_ACTIVE_LOW)

			v |= MXC_H1_OC_POL_BIT;

		else

			v &= ~MXC_H1_OC_POL_BIT;

		if (flags & MXC_EHCI_POWER_PINS_ENABLED)

			v &= ~MXC_H1_OC_DIS_BIT; /* OC is used */

		else

			v |= MXC_H1_OC_DIS_BIT; /* OC is not used */

		__raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC_OFFSET);



		v = __raw_readl(usbotg_base + MXC_USBCMD_OFFSET);

		if (flags & MXC_EHCI_ITC_NO_THRESHOLD)

			/* Interrupt Threshold Control:Immediate (no threshold) */

			v &= MXC_UCMD_ITC_NO_THRESHOLD_MASK;

		__raw_writel(v, usbotg_base + MXC_USBCMD_OFFSET);

		break;

	case 2: /* Host 2 ULPI */

		v = __raw_readl(usbother_base + MXC_USBH2CTRL_OFFSET);

		if (flags & MXC_EHCI_WAKEUP_ENABLED) {

			/* HOST1 wakeup/ULPI intr enable */

			v |= (MXC_H2_UCTRL_H2WIE_BIT | MXC_H2_UCTRL_H2UIE_BIT);

		} else {

			/* HOST1 wakeup/ULPI intr disable */

			v &= ~(MXC_H2_UCTRL_H2WIE_BIT | MXC_H2_UCTRL_H2UIE_BIT);

		}



		if (flags & MXC_EHCI_POWER_PINS_ENABLED)

			v &= ~MXC_H2_UCTRL_H2PM_BIT; /* HOST2 power mask unused*/

		else

			v |= MXC_H2_UCTRL_H2PM_BIT; /* HOST2 power mask used*/

		__raw_writel(v, usbother_base + MXC_USBH2CTRL_OFFSET);

		break;

	}



error:

	iounmap(usb_base);

	return ret;

}

arch/arm/mach-imx/ehci.h

+0 −7
Original line number Diff line number Diff line
@@ -35,13 +35,6 @@ 
#define MXC_USB_PHY_CTR_FUNC2_OFFSET	0xc

#define MXC_USBH2CTRL_OFFSET		0x14



#define MX5_USBOTHER_REGS_OFFSET	0x800



/* USB_PHY_CTRL_FUNC2*/

#define MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK		0x3

#define MX5_USB_UTMI_PHYCTRL1_PLLDIV_SHIFT		0



int mx51_initialize_usb_hw(int port, unsigned int flags);

int mx25_initialize_usb_hw(int port, unsigned int flags);

int mx31_initialize_usb_hw(int port, unsigned int flags);

int mx35_initialize_usb_hw(int port, unsigned int flags);