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Commit 900c6f98 authored by Vivek Aknurwar's avatar Vivek Aknurwar
Browse files

clk: qcom: gcc-lahaina: Enable gpu_memnoc_gfx and gpu_snoc_dvm_gfx always 



SMMU hw voting did not tie these 2 clocks. Although these
clocks are default enabled on boot, SW needs to explicitly
make sure to keep them always enabled to keep smmu access.
These clks will automatically turn on/off along with
CX_GDSC so no power hit.

Change-Id: I4fb82589f63c0a321465e249e54f94be7e5449a3
Signed-off-by: default avatarVivek Aknurwar <viveka@codeaurora.org>
parent 3bdb50e5

drivers/clk/qcom/gcc-lahaina.c

+3 −3
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2019, The Linux Foundation. All rights reserved.

 * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.

 */



#include <linux/bitops.h>
@@ -2374,7 +2374,7 @@ static struct clk_branch gcc_gpu_memnoc_gfx_clk = { 
		.enable_mask = BIT(0),

		.hw.init = &(struct clk_init_data){

			.name = "gcc_gpu_memnoc_gfx_clk",

			.ops = &clk_branch2_ops,

			.ops = &clk_branch2_aon_ops,

		},

	},

};
@@ -2387,7 +2387,7 @@ static struct clk_branch gcc_gpu_snoc_dvm_gfx_clk = { 
		.enable_mask = BIT(0),

		.hw.init = &(struct clk_init_data){

			.name = "gcc_gpu_snoc_dvm_gfx_clk",

			.ops = &clk_branch2_ops,

			.ops = &clk_branch2_aon_ops,

		},

	},

};