Merge "ARM: dts: msm: Add LLCC entry for Shima" (8fa23e4e) · Commits · e / devices / android_kernel_fairphone_FP5

qcom/ipcc-test-shima.dtsi

0 → 100644

+5 −0

Original line number	Diff line number	Diff line
		#include "ipcc-test.dtsi"

		&soc {
		/delete-node/ ipcc-self-ping-slpi;
		};

+8 −0

Original line number	Diff line number	Diff line
		@@ -895,6 +895,13 @@
		reg-names = "pshold-base", "tcsr-boot-misc-detect";
		};

		cache-controller@9200000 {
		compatible = "qcom,shima-llcc", "qcom,llcc-v2";
		reg = <0x9200000 0xd0000> , <0x9600000 0x50000>;
		reg-names = "llcc_base", "llcc_broadcast_base";
		cap-based-alloc-and-pwr-collapse;
		};

		clk_virt: interconnect {
		compatible = "qcom,shima-clk_virt";
		#interconnect-cells = <1>;
		@@ -967,6 +974,7 @@
		#include "shima-gdsc.dtsi"
		#include "shima-ion.dtsi"
		#include "shima-usb.dtsi"
		#include "ipcc-test-shima.dtsi"

		&gcc_pcie_0_gdsc {
		status = "ok";