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Commit 8f5718a6 authored by Daniel Vetter's avatar Daniel Vetter
Browse files

drm/i915: drop unnecessary check from fdi_link_train code 



They are all written for a specific north disaplay->pch combination.
So stop pretending otherwise.

Reviewed-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 7fcb83cd

drivers/gpu/drm/i915/intel_display.c

+5 −9
Original line number Diff line number Diff line
@@ -2490,11 +2490,9 @@ static void ironlake_fdi_link_train(struct drm_crtc *crtc) 
	udelay(150);



	/* Ironlake workaround, enable clock pointer after FDI enable*/

	if (HAS_PCH_IBX(dev)) {

	I915_WRITE(FDI_RX_CHICKEN(pipe), FDI_RX_PHASE_SYNC_POINTER_OVR);

	I915_WRITE(FDI_RX_CHICKEN(pipe), FDI_RX_PHASE_SYNC_POINTER_OVR |

		   FDI_RX_PHASE_SYNC_POINTER_EN);

	}



	reg = FDI_RX_IIR(pipe);

	for (tries = 0; tries < 5; tries++) {
@@ -2600,7 +2598,6 @@ static void gen6_fdi_link_train(struct drm_crtc *crtc) 
	POSTING_READ(reg);

	udelay(150);



	if (HAS_PCH_CPT(dev))

	cpt_phase_pointer_enable(dev, pipe);



	for (i = 0; i < 4; i++) {
@@ -2735,7 +2732,6 @@ static void ivb_manual_fdi_link_train(struct drm_crtc *crtc) 
	POSTING_READ(reg);

	udelay(150);



	if (HAS_PCH_CPT(dev))

	cpt_phase_pointer_enable(dev, pipe);



	for (i = 0; i < 4; i++) {