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Commit 8f4c1d00 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: add l3 latfloor in shima target"

parents 86aa6c7e 4c279b69

qcom/shima.dtsi

+19 −0
Original line number Original line Diff line number Diff line
@@ -2373,6 +2373,16 @@ 
			 &epss_l3_cpu SLAVE_EPSS_L3_CPU7>;

			 &epss_l3_cpu SLAVE_EPSS_L3_CPU7>;

	};

	};





	cpu7_cpu_l3_latfloor: qcom,cpu7-cpu-l3-latfloor {

		compatible = "qcom,devfreq-icc-l3";

		reg = <0x18590100 0xa0>;

		reg-names = "ftbl-base";

		governor = "compute";

		interconnects =

			<&epss_l3_cpu MASTER_EPSS_L3_APPS

			 &epss_l3_cpu SLAVE_EPSS_L3_SHARED>;

	};



	cpu0_cpu_llcc_lat: qcom,cpu0-cpu-llcc-lat {

	cpu0_cpu_llcc_lat: qcom,cpu0-cpu-llcc-lat {

		compatible = "qcom,devfreq-icc";

		compatible = "qcom,devfreq-icc";

		governor = "mem_latency";

		governor = "mem_latency";
@@ -2549,6 +2559,15 @@ 
			qcom,core-dev-table = <&cpu7_cpu_l3_tbl>;

			qcom,core-dev-table = <&cpu7_cpu_l3_tbl>;

		};

		};





		cpu7_l3_computemon: qcom,cpu7-l3-computemon {

			compatible = "qcom,arm-compute-mon";

			qcom,cpulist = <&CPU7>;

			qcom,target-dev = <&cpu7_cpu_l3_latfloor>;

			qcom,core-dev-table =

				< 2169600  300000000 >,

				< 2707200 1420800000 >;

		};



		cpu0_cpu_llcc_latmon: qcom,cpu0-cpu-llcc-latmon {

		cpu0_cpu_llcc_latmon: qcom,cpu0-cpu-llcc-latmon {

			compatible = "qcom,arm-memlat-mon";

			compatible = "qcom,arm-memlat-mon";

			qcom,target-dev = <&cpu0_cpu_llcc_lat>;

			qcom,target-dev = <&cpu0_cpu_llcc_lat>;