Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 8f2c0f3c authored by Sarthak Garg's avatar Sarthak Garg Committed by Gerrit - the friendly Code Review server
Browse files

mmc: host: sdhci-msm: Enable SDHC FIFO explicitly 



Enable SDHC FIFO explicitly by disabling the alternative FIFO.

The boot-loaders might use alternative FIFO instead of HC FIFO.
And the vendor specific register which has this setting won't get
reset with controller reset. So the FIFO setting done by the
bootloader would remain as it is unless its explicitly cleared.
Without clearing this setting, mmc driver can't make use of regular
FIFO mode.

Change-Id: Icd22f318d6f24e54afbcedacf026977b29de4e95
Signed-off-by: default avatarSarthak Garg <sartgarg@codeaurora.org>
parent e445c189

drivers/mmc/host/sdhci-msm.c

+6 −1
Original line number Diff line number Diff line
@@ -112,7 +112,7 @@ 
#define CORE_START_CDC_TRAFFIC		BIT(6)



#define CORE_PWRSAVE_DLL	BIT(3)



#define CORE_FIFO_ALT_EN	BIT(10)

#define DDR_CONFIG_POR_VAL		0x80040873

#define DLL_USR_CTL_POR_VAL		0x10800

#define ENABLE_DLL_LOCK_STATUS		BIT(26)
@@ -3857,6 +3857,11 @@ static int sdhci_msm_probe(struct platform_device *pdev) 
	writel_relaxed(CORE_VENDOR_SPEC_POR_VAL,

			host->ioaddr + msm_offset->core_vendor_spec);



	/* Ensure SDHCI FIFO is enabled by disabling alternative FIFO */

	config = readl_relaxed(host->ioaddr + msm_offset->core_vendor_spec3);

	config &= ~CORE_FIFO_ALT_EN;

	writel_relaxed(config, host->ioaddr + msm_offset->core_vendor_spec3);



	if (!msm_host->mci_removed) {

		/* Set HC_MODE_EN bit in HC_MODE register */

		msm_host_writel(msm_host, HC_MODE_EN, host,