Loading qcom/shima-gpu.dtsi +2 −6 Original line number Diff line number Diff line Loading @@ -51,8 +51,6 @@ qcom,min-access-length = <32>; qcom,ubwc-mode = <4>; qcom,gpu-qdss-stm = <0x161c0000 0x40000>; /* base addr, size */ qcom,tzone-names = "gpuss-0-usr", "gpuss-1-usr"; interconnects = <&gem_noc MASTER_GFX3D &mc_virt SLAVE_EBI1>; Loading Loading @@ -577,12 +575,10 @@ <&gcc GCC_GPU_MEMNOC_GFX_CLK>, <&gpucc GPU_CC_AHB_CLK>, <&gpucc GPU_CC_HUB_CX_INT_CLK>, <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>, <&aopcc QDSS_CLK>; <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>; clock-names = "gmu_clk", "cxo_clk", "axi_clk", "memnoc_clk", "ahb_clk", "hub_clk", "smmu_vote", "apb_pclk"; "memnoc_clk", "ahb_clk", "hub_clk", "smmu_vote"; mboxes = <&qmp_aop 0>; mbox-names = "aop"; Loading Loading
qcom/shima-gpu.dtsi +2 −6 Original line number Diff line number Diff line Loading @@ -51,8 +51,6 @@ qcom,min-access-length = <32>; qcom,ubwc-mode = <4>; qcom,gpu-qdss-stm = <0x161c0000 0x40000>; /* base addr, size */ qcom,tzone-names = "gpuss-0-usr", "gpuss-1-usr"; interconnects = <&gem_noc MASTER_GFX3D &mc_virt SLAVE_EBI1>; Loading Loading @@ -577,12 +575,10 @@ <&gcc GCC_GPU_MEMNOC_GFX_CLK>, <&gpucc GPU_CC_AHB_CLK>, <&gpucc GPU_CC_HUB_CX_INT_CLK>, <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>, <&aopcc QDSS_CLK>; <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>; clock-names = "gmu_clk", "cxo_clk", "axi_clk", "memnoc_clk", "ahb_clk", "hub_clk", "smmu_vote", "apb_pclk"; "memnoc_clk", "ahb_clk", "hub_clk", "smmu_vote"; mboxes = <&qmp_aop 0>; mbox-names = "aop"; Loading