Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 8e725f7c authored by Rahul Lakkireddy's avatar Rahul Lakkireddy Committed by David S. Miller
Browse files

cxgb4: update LE-TCAM collection for T6 



For T6, clip table is separated from main TCAM. So, update LE-TCAM
collection logic to collect clip table TCAM as well. IPv6 takes
4 entries in clip table TCAM compared to 2 entries in main TCAM.

Also, in case of errors, keep LE-TCAM collected so far and set the
status to partial dump.

Signed-off-by: default avatarRahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: default avatarGanesh Goudar <ganeshgr@chelsio.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 7e360d9d

drivers/net/ethernet/chelsio/cxgb4/cudbg_entity.h

+3 −0
Original line number Diff line number Diff line
@@ -235,6 +235,9 @@ struct cudbg_vpd_data { 
};



#define CUDBG_MAX_TCAM_TID 0x800

#define CUDBG_T6_CLIP 1536

#define CUDBG_MAX_TID_COMP_EN 6144

#define CUDBG_MAX_TID_COMP_DIS 3072



enum cudbg_le_entry_types {

	LE_ET_UNKNOWN = 0,

drivers/net/ethernet/chelsio/cxgb4/cudbg_if.h

+1 −0
Original line number Diff line number Diff line
@@ -24,6 +24,7 @@ 
#define CUDBG_STATUS_NOT_IMPLEMENTED -28

#define CUDBG_SYSTEM_ERROR -29

#define CUDBG_STATUS_CCLK_NOT_DEFINED -32

#define CUDBG_STATUS_PARTIAL_DATA -41



#define CUDBG_MAJOR_VERSION 1

#define CUDBG_MINOR_VERSION 14

drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c

+32 −8
Original line number Diff line number Diff line
@@ -2366,7 +2366,10 @@ void cudbg_fill_le_tcam_info(struct adapter *padap, 
	value = t4_read_reg(padap, LE_DB_ROUTING_TABLE_INDEX_A);

	tcam_region->routing_start = value;



	/*Get clip table index */

	/* Get clip table index. For T6 there is separate CLIP TCAM */

	if (is_t6(padap->params.chip))

		value = t4_read_reg(padap, LE_DB_CLCAM_TID_BASE_A);

	else

		value = t4_read_reg(padap, LE_DB_CLIP_TABLE_INDEX_A);

	tcam_region->clip_start = value;
@@ -2392,8 +2395,16 @@ void cudbg_fill_le_tcam_info(struct adapter *padap, 
					       tcam_region->tid_hash_base;

		}

	} else { /* hash not enabled */

		if (is_t6(padap->params.chip))

			tcam_region->max_tid = (value & ASLIPCOMPEN_F) ?

					       CUDBG_MAX_TID_COMP_EN :

					       CUDBG_MAX_TID_COMP_DIS;

		else

			tcam_region->max_tid = CUDBG_MAX_TCAM_TID;

	}



	if (is_t6(padap->params.chip))

		tcam_region->max_tid += CUDBG_T6_CLIP;

}



int cudbg_collect_le_tcam(struct cudbg_init *pdbg_init,
@@ -2423,18 +2434,31 @@ int cudbg_collect_le_tcam(struct cudbg_init *pdbg_init, 
	for (i = 0; i < tcam_region.max_tid; ) {

		rc = cudbg_read_tid(pdbg_init, i, tid_data);

		if (rc) {

			cudbg_err->sys_err = rc;

			cudbg_put_buff(pdbg_init, &temp_buff);

			return rc;

			cudbg_err->sys_warn = CUDBG_STATUS_PARTIAL_DATA;

			/* Update tcam header and exit */

			tcam_region.max_tid = i;

			memcpy(temp_buff.data, &tcam_region,

			       sizeof(struct cudbg_tcam));

			goto out;

		}



		/* ipv6 takes two tids */

		cudbg_is_ipv6_entry(tid_data, tcam_region) ? i += 2 : i++;

		if (cudbg_is_ipv6_entry(tid_data, tcam_region)) {

			/* T6 CLIP TCAM: ipv6 takes 4 entries */

			if (is_t6(padap->params.chip) &&

			    i >= tcam_region.clip_start &&

			    i < tcam_region.clip_start + CUDBG_T6_CLIP)

				i += 4;

			else /* Main TCAM: ipv6 takes two tids */

				i += 2;

		} else {

			i++;

		}



		tid_data++;

		bytes += sizeof(struct cudbg_tid_data);

	}



out:

	return cudbg_write_and_release_buff(pdbg_init, &temp_buff, dbg_buff);

}

drivers/net/ethernet/chelsio/cxgb4/t4_regs.h

+1 −0
Original line number Diff line number Diff line
@@ -2999,6 +2999,7 @@ 
#define LE_DB_HASH_TID_BASE_A 0x19c30

#define LE_DB_HASH_TBL_BASE_ADDR_A 0x19c30

#define LE_DB_INT_CAUSE_A 0x19c3c

#define LE_DB_CLCAM_TID_BASE_A 0x19df4

#define LE_DB_TID_HASHBASE_A 0x19df8

#define T6_LE_DB_HASH_TID_BASE_A 0x19df8