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Commit 8e22ba96 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'riscv-for-linus-5.1-rc4' of...

Merge tag 'riscv-for-linus-5.1-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux

Pull RISC-V fixes from Palmer Dabbelt:
 "I dropped the ball a bit here: these patches should all probably have
  been part of rc2, but I wanted to get around to properly testing them
  in the various configurations (qemu32, qeum64, unleashed) first.

  Unfortunately I've been traveling and didn't have time to actually do
  that, but since these fix concrete bugs and pass my old set of tests I
  don't want to delay the fixes any longer.

  There are four independent fixes here:

   - A fix for the rv32 port that corrects the 64-bit user accesor's
     fixup label address.

   - A fix for a regression introduced during the merge window that
     broke medlow configurations at run time. This patch also includes a
     fix that disables ftrace for the same set of functions, which was
     found by inspection at the same time.

   - A modification of the memory map to avoid overlapping the FIXMAP
     and VMALLOC regions on systems with small memory maps.

   - A fix to the module handling code to use the correct syntax for
     probing Kconfig entries.

  These have passed my standard test flow, but I didn't have time to
  expand that testing like I said I would"

* tag 'riscv-for-linus-5.1-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux:
  RISC-V: Use IS_ENABLED(CONFIG_CMODEL_MEDLOW)
  RISC-V: Fix FIXMAP_TOP to avoid overlap with VMALLOC area
  RISC-V: Always compile mm/init.c with cmodel=medany and notrace
  riscv: fix accessing 8-byte variable from RV32
parents 20ad5494 da4ed378
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+1 −1
Original line number Diff line number Diff line
@@ -26,7 +26,7 @@ enum fixed_addresses {
};

#define FIXADDR_SIZE		(__end_of_fixed_addresses * PAGE_SIZE)
#define FIXADDR_TOP		(PAGE_OFFSET)
#define FIXADDR_TOP		(VMALLOC_START)
#define FIXADDR_START		(FIXADDR_TOP - FIXADDR_SIZE)

#define FIXMAP_PAGE_IO		PAGE_KERNEL
+1 −1
Original line number Diff line number Diff line
@@ -300,7 +300,7 @@ do { \
		"	.balign 4\n"				\
		"4:\n"						\
		"	li %0, %6\n"				\
		"	jump 2b, %1\n"				\
		"	jump 3b, %1\n"				\
		"	.previous\n"				\
		"	.section __ex_table,\"a\"\n"		\
		"	.balign " RISCV_SZPTR "\n"			\
+0 −3
Original line number Diff line number Diff line
@@ -4,7 +4,6 @@

ifdef CONFIG_FTRACE
CFLAGS_REMOVE_ftrace.o = -pg
CFLAGS_REMOVE_setup.o = -pg
endif

extra-y += head.o
@@ -29,8 +28,6 @@ obj-y += vdso.o
obj-y	+= cacheinfo.o
obj-y	+= vdso/

CFLAGS_setup.o := -mcmodel=medany

obj-$(CONFIG_FPU)		+= fpu.o
obj-$(CONFIG_SMP)		+= smpboot.o
obj-$(CONFIG_SMP)		+= smp.o
+1 −1
Original line number Diff line number Diff line
@@ -141,7 +141,7 @@ static int apply_r_riscv_hi20_rela(struct module *me, u32 *location,
{
	s32 hi20;

	if (IS_ENABLED(CMODEL_MEDLOW)) {
	if (IS_ENABLED(CONFIG_CMODEL_MEDLOW)) {
		pr_err(
		  "%s: target %016llx can not be addressed by the 32-bit offset from PC = %p\n",
		  me->name, (long long)v, location);
+0 −8
Original line number Diff line number Diff line
@@ -48,14 +48,6 @@ struct screen_info screen_info = {
};
#endif

unsigned long va_pa_offset;
EXPORT_SYMBOL(va_pa_offset);
unsigned long pfn_base;
EXPORT_SYMBOL(pfn_base);

unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] __page_aligned_bss;
EXPORT_SYMBOL(empty_zero_page);

/* The lucky hart to first increment this variable will boot the other cores */
atomic_t hart_lottery;
unsigned long boot_cpu_hartid;
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