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Commit 8df97495 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge branch 'samsung/board' into next/boards 

* samsung/board:
  ARM: S3C64XX: Hook up VDDINT on Cragganmore
  ARM: S3C2440: Add new LCD (W35i) support for Mini2440 board
  ARM: S3C64XX: Power gate unused domains
  ARM: S3C64XX: Hook up Littlemill audio card on Cragganmore
  ARM: S3C64XX: Hook up platform data for Kilchomin module on Cragganmore
  ARM: S3C64XX: Run Tobermory interrupts in the default mode
  ARM: S3C64XX: Improve logging of unknown Cragganmore module types
  ARM: S3C64XX: Configure WM1250 EV1 GPIOs on Cragganmore
  ARM: S3C64XX: Use software initiated powerdown for Cragganmore
  ARM: S3C64XX: Raise the frequency of the second I2C bus on Cragganmore
  ARM: S3C64XX: Correct reservation of GPIOs for CPU module on Cragganmore
  ARM: SAMSUNG: Fix GPIO space reservation for S3C64xx platforms
  ARM: S3C64XX: Update for conversion to SAMSUNG_GPIO_EXTRA

Conflicts:
	arch/arm/mach-s3c64xx/mach-crag6410.c
parents 578bd83d 39cb263e

arch/arm/mach-s3c2440/mach-mini2440.c

+18 −0
Original line number Diff line number Diff line
@@ -167,6 +167,24 @@ static struct s3c2410fb_display mini2440_lcd_cfg[] __initdata = { 
		.lcdcon5	= (S3C2410_LCDCON5_FRM565 |

				   S3C2410_LCDCON5_HWSWP),

	},

	/* mini2440 + 3.5" TFT (LCD-W35i, LQ035Q1DG06 type) + touchscreen*/

	[3] = {

		_LCD_DECLARE(

			/* clock */

			7,

			/* xres, margin_right, margin_left, hsync */

			320, 68, 66, 4,

			/* yres, margin_top, margin_bottom, vsync */

			240, 4, 4, 9,

			/* refresh rate */

			60),

		.lcdcon5	= (S3C2410_LCDCON5_FRM565 |

				   S3C2410_LCDCON5_INVVDEN |

				   S3C2410_LCDCON5_INVVFRAME |

				   S3C2410_LCDCON5_INVVLINE |

				   S3C2410_LCDCON5_INVVCLK |

				   S3C2410_LCDCON5_HWSWP),

	},

};



/* todo - put into gpio header */

arch/arm/mach-s3c64xx/Kconfig

+3 −3
Original line number Diff line number Diff line
@@ -188,7 +188,7 @@ config SMDK6410_WM1190_EV1 
	depends on MACH_SMDK6410

	select REGULATOR

	select REGULATOR_WM8350

	select S3C24XX_GPIO_EXTRA64

	select SAMSUNG_GPIO_EXTRA64

	select MFD_WM8350_I2C

	select MFD_WM8350_CONFIG_MODE_0

	select MFD_WM8350_CONFIG_MODE_3
@@ -206,7 +206,7 @@ config SMDK6410_WM1192_EV1 
	depends on MACH_SMDK6410

	select REGULATOR

	select REGULATOR_WM831X

	select S3C24XX_GPIO_EXTRA64

	select SAMSUNG_GPIO_EXTRA64

	select MFD_WM831X

	select MFD_WM831X_I2C

	help
@@ -287,7 +287,7 @@ config MACH_WLF_CRAGG_6410 
	select S3C_DEV_WDT

	select S3C_DEV_RTC

	select S3C64XX_DEV_SPI

	select S3C24XX_GPIO_EXTRA128

	select SAMSUNG_GPIO_EXTRA128

	select I2C

	help

	  Machine support for the Wolfson Cragganmore S3C6410 variant.

arch/arm/mach-s3c64xx/include/mach/crag6410.h

+4 −2
Original line number Diff line number Diff line
@@ -15,9 +15,11 @@ 


#define BANFF_PMIC_IRQ_BASE		IRQ_BOARD_START

#define GLENFARCLAS_PMIC_IRQ_BASE	(IRQ_BOARD_START + 64)

#define CODEC_IRQ_BASE			(IRQ_BOARD_START + 128)



#define PCA935X_GPIO_BASE		GPIO_BOARD_START

#define CODEC_GPIO_BASE			(GPIO_BOARD_START + 8)

#define GLENFARCLAS_PMIC_GPIO_BASE	(GPIO_BOARD_START + 16)

#define GLENFARCLAS_PMIC_GPIO_BASE	(GPIO_BOARD_START + 32)

#define BANFF_PMIC_GPIO_BASE		(GPIO_BOARD_START + 64)



#endif

arch/arm/mach-s3c64xx/include/mach/gpio.h

+1 −1
Original line number Diff line number Diff line
@@ -88,6 +88,6 @@ enum s3c_gpio_number { 
/* define the number of gpios we need to the one after the GPQ() range */

#define GPIO_BOARD_START (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1)



#define BOARD_NR_GPIOS 16

#define BOARD_NR_GPIOS	(16 + CONFIG_SAMSUNG_GPIO_EXTRA)



#define ARCH_NR_GPIOS	(GPIO_BOARD_START + BOARD_NR_GPIOS)

arch/arm/mach-s3c64xx/include/mach/irqs.h

+1 −1
Original line number Diff line number Diff line
@@ -169,7 +169,7 @@ 
#define IRQ_BOARD_START (IRQ_EINT_GROUP9_BASE + IRQ_EINT_GROUP9_NR + 1)



#ifdef CONFIG_MACH_WLF_CRAGG_6410

#define IRQ_BOARD_NR 128

#define IRQ_BOARD_NR 160

#elif defined(CONFIG_SMDK6410_WM1190_EV1)

#define IRQ_BOARD_NR 64

#elif defined(CONFIG_SMDK6410_WM1192_EV1)