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Commit 8df42fb3 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "msm: ipa: enable SYSPIPE_ERR_DETECTION bit for deaggr_err"

parents 5a5437d6 70fcaf66

drivers/platform/msm/ipa/ipa_clients/rndis_ipa.c

+3 −1
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2013-2019, The Linux Foundation. All rights reserved.

 * Copyright (c) 2013-2020, The Linux Foundation. All rights reserved.

 */



#include <linux/atomic.h>
@@ -435,8 +435,10 @@ static struct ipa_ep_cfg usb_to_ipa_ep_cfg_deaggr_en = { 
	},

	.deaggr = {

		.deaggr_hdr_len = sizeof(struct rndis_pkt_hdr),

		.syspipe_err_detection = true,

		.packet_offset_valid = true,

		.packet_offset_location = 8,

		.ignore_min_pkt_err = true,

		.max_packet_len = 8192, /* Will be overridden*/

	},

	.route = {

drivers/platform/msm/ipa/ipa_v3/ipa_utils.c

+6 −0
Original line number Diff line number Diff line
@@ -5656,6 +5656,9 @@ int ipa3_cfg_ep_deaggr(u32 clnt_hdl, 
		clnt_hdl,

		ep_deaggr->deaggr_hdr_len);



	IPADBG("syspipe_err_detection=%d\n",

		ep_deaggr->syspipe_err_detection);



	IPADBG("packet_offset_valid=%d\n",

		ep_deaggr->packet_offset_valid);
@@ -5663,6 +5666,9 @@ int ipa3_cfg_ep_deaggr(u32 clnt_hdl, 
		ep_deaggr->packet_offset_location,

		ep_deaggr->max_packet_len);



	IPADBG("ignore_min_pkt_err=%d\n",

		ep_deaggr->ignore_min_pkt_err);



	ep = &ipa3_ctx->ep[clnt_hdl];



	/* copy over EP cfg */

drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_reg.c

+33 −2
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2012-2019, The Linux Foundation. All rights reserved.

 * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.

 */



#include <linux/init.h>
@@ -1678,6 +1678,37 @@ static void ipareg_construct_endp_init_deaggr_n( 
		IPA_ENDP_INIT_DEAGGR_n_MAX_PACKET_LEN_BMSK);

}



static void ipareg_construct_endp_init_deaggr_n_v4_5(

		enum ipahal_reg_name reg, const void *fields, u32 *val)

{

	struct ipa_ep_cfg_deaggr *ep_deaggr =

		(struct ipa_ep_cfg_deaggr *)fields;



	IPA_SETFIELD_IN_REG(*val, ep_deaggr->deaggr_hdr_len,

		IPA_ENDP_INIT_DEAGGR_n_DEAGGR_HDR_LEN_SHFT,

		IPA_ENDP_INIT_DEAGGR_n_DEAGGR_HDR_LEN_BMSK);



	IPA_SETFIELD_IN_REG(*val, ep_deaggr->syspipe_err_detection,

		IPA_ENDP_INIT_DEAGGR_n_SYSPIPE_ERR_DETECTION_SHFT,

		IPA_ENDP_INIT_DEAGGR_n_SYSPIPE_ERR_DETECTION_BMSK);



	IPA_SETFIELD_IN_REG(*val, ep_deaggr->packet_offset_valid,

		IPA_ENDP_INIT_DEAGGR_n_PACKET_OFFSET_VALID_SHFT,

		IPA_ENDP_INIT_DEAGGR_n_PACKET_OFFSET_VALID_BMSK);



	IPA_SETFIELD_IN_REG(*val, ep_deaggr->packet_offset_location,

		IPA_ENDP_INIT_DEAGGR_n_PACKET_OFFSET_LOCATION_SHFT,

		IPA_ENDP_INIT_DEAGGR_n_PACKET_OFFSET_LOCATION_BMSK);



	IPA_SETFIELD_IN_REG(*val, ep_deaggr->ignore_min_pkt_err,

		IPA_ENDP_INIT_DEAGGR_n_IGNORE_MIN_PKT_ERR_SHFT,

		IPA_ENDP_INIT_DEAGGR_n_IGNORE_MIN_PKT_ERR_BMSK);



	IPA_SETFIELD_IN_REG(*val, ep_deaggr->max_packet_len,

		IPA_ENDP_INIT_DEAGGR_n_MAX_PACKET_LEN_SHFT,

		IPA_ENDP_INIT_DEAGGR_n_MAX_PACKET_LEN_BMSK);

}



static void ipareg_construct_endp_init_hol_block_en_n(

	enum ipahal_reg_name reg, const void *fields, u32 *val)

{
@@ -3374,7 +3405,7 @@ static struct ipahal_reg_obj ipahal_reg_objs[IPA_HW_MAX][IPA_REG_MAX] = { 
		ipareg_construct_endp_init_cfg_n, ipareg_parse_dummy,

		0x00000808, 0x70, 0, 30, 1},

	[IPA_HW_v4_5][IPA_ENDP_INIT_DEAGGR_n] = {

		ipareg_construct_endp_init_deaggr_n,

		ipareg_construct_endp_init_deaggr_n_v4_5,

		ipareg_parse_dummy,

		0x00000834, 0x70, 0, 12, 1},

	[IPA_HW_v4_5][IPA_ENDP_INIT_CTRL_n] = {

drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_reg_i.h

+5 −1
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-only */

/*

 * Copyright (c) 2012-2019, The Linux Foundation. All rights reserved.

 * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.

 */



#ifndef _IPAHAL_REG_I_H_
@@ -215,10 +215,14 @@ int ipahal_reg_init(enum ipa_hw_type ipa_hw_type); 
/* IPA_ENDP_INIT_DEAGGR_n register */

#define IPA_ENDP_INIT_DEAGGR_n_MAX_PACKET_LEN_BMSK 0xFFFF0000

#define IPA_ENDP_INIT_DEAGGR_n_MAX_PACKET_LEN_SHFT 0x10

#define IPA_ENDP_INIT_DEAGGR_n_IGNORE_MIN_PKT_ERR_BMSK 0x4000

#define IPA_ENDP_INIT_DEAGGR_n_IGNORE_MIN_PKT_ERR_SHFT 0xe

#define IPA_ENDP_INIT_DEAGGR_n_PACKET_OFFSET_LOCATION_BMSK 0x3F00

#define IPA_ENDP_INIT_DEAGGR_n_PACKET_OFFSET_LOCATION_SHFT 0x8

#define IPA_ENDP_INIT_DEAGGR_n_PACKET_OFFSET_VALID_BMSK  0x80

#define IPA_ENDP_INIT_DEAGGR_n_PACKET_OFFSET_VALID_SHFT 0x7

#define IPA_ENDP_INIT_DEAGGR_n_SYSPIPE_ERR_DETECTION_BMSK 0x40

#define IPA_ENDP_INIT_DEAGGR_n_SYSPIPE_ERR_DETECTION_SHFT 0x6

#define IPA_ENDP_INIT_DEAGGR_n_DEAGGR_HDR_LEN_BMSK 0x3F

#define IPA_ENDP_INIT_DEAGGR_n_DEAGGR_HDR_LEN_SHFT 0x0