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Commit 8dcd4ab0 authored by Gregory CLEMENT's avatar Gregory CLEMENT
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arm64: dts: marvell: remove *-clock-output-names on cp110



The *-clock-output-names of the cp110-system-controller0 node are not
used anymore, so remove them.

Reviewed-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
parent a6d8bd91
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+0 −13
Original line number Diff line number Diff line
@@ -111,19 +111,6 @@
					     "syscon";
				reg = <0x440000 0x1000>;
				#clock-cells = <2>;
				core-clock-output-names =
					"cpm-apll", "cpm-ppv2-core", "cpm-eip",
					"cpm-core", "cpm-nand-core";
				gate-clock-output-names =
					"cpm-audio", "cpm-communit", "cpm-nand",
					"cpm-ppv2", "cpm-sdio", "cpm-mg-domain",
					"cpm-mg-core", "cpm-xor1", "cpm-xor0",
					"cpm-gop-dp", "none", "cpm-pcie_x10",
					"cpm-pcie_x11", "cpm-pcie_x4", "cpm-pcie-xor",
					"cpm-sata", "cpm-sata-usb", "cpm-main",
					"cpm-sd-mmc-gop", "none", "none",
					"cpm-slow-io", "cpm-usb3h0", "cpm-usb3h1",
					"cpm-usb3dev", "cpm-eip150", "cpm-eip197";
			};

			cpm_rtc: rtc@284000 {
+0 −13
Original line number Diff line number Diff line
@@ -118,19 +118,6 @@
					     "syscon";
				reg = <0x440000 0x1000>;
				#clock-cells = <2>;
				core-clock-output-names =
					"cps-apll", "cps-ppv2-core", "cps-eip",
					"cps-core", "cps-nand-core";
				gate-clock-output-names =
					"cps-audio", "cps-communit", "cps-nand",
					"cps-ppv2", "cps-sdio", "cps-mg-domain",
					"cps-mg-core", "cps-xor1", "cps-xor0",
					"cps-gop-dp", "none", "cps-pcie_x10",
					"cps-pcie_x11", "cps-pcie_x4", "cps-pcie-xor",
					"cps-sata", "cps-sata-usb", "cps-main",
					"cps-sd-mmc-gop", "none", "none",
					"cps-slow-io", "cps-usb3h0", "cps-usb3h1",
					"cps-usb3dev", "cps-eip150", "cps-eip197";
			};

			cps_sata0: sata@540000 {