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Commit 8dc5a38b authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: qcom: PCIe to Gen3 for NTN3 CPE Pine1x"

parents cabb7131 bf94c9f0

bindings/cnss/cnss-wlan.txt

+1 −0
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ Required properties: 
                "qcom,cnss-qca6390" for QCA6390 device

                "qcom,cnss-qca6490" for QCA6490 device

                "qcom,cnss-wcn7850" for WCN7850 device

                "qcom,cnss-qcn9000" for QCN9000 device

                "qcom,cnss-qca-converged" for converged QCA devices

  - wlan-en-gpio: WLAN_EN GPIO signal specified by the chip specifications

  - vdd-wlan-supply: phandle to the regulator device tree node

qcom/sdxlemur-mtp-cpe-hsp.dtsi

0 → 100644
+41 −0
Original line number Diff line number Diff line 
#include "sdxlemur-cnss.dtsi"



&pcie0 {

	qcom,boot-option = <0x1>;

};



&pcie0_bus2_dev2_fn0 {

	cnss_pci0: cnss_pci0 {

		reg = <0 0 0 0 0>;

		qcom,iommu-group = <&cnss_pci_iommu_group>;

		memory-region = <&cnss_wlan_mem>;



		#address-cells = <1>;

		#size-cells = <1>;

	};

};



&wlan {

	mhi_events {

		mhi_event@0 {

			mhi,num-elements = <32>;

			mhi,intmod = <0>;

			mhi,msi = <1>;

			mhi,priority = <0>;

			mhi,brstmode = <2>;

			mhi,data-type = <1>;

		};



		mhi_event@1 {

			mhi,num-elements = <256>;

			mhi,intmod = <0>;

			mhi,msi = <2>;

			mhi,priority = <1>;

			mhi,brstmode = <2>;

		};



		mhi_event@2 {

			status = "disabled";

		};

	};

};

qcom/sdxlemur-mtp-cpe-pine1x.dtsi

+57 −0
Original line number Diff line number Diff line 


#include "sdxlemur-qcn9000.dtsi"



&soc {

	pine_vreg: pine_vreg {

		compatible = "regulator-fixed";

		regulator-name = "pine_vreg";

		gpio = <&tlmm 102 GPIO_ACTIVE_HIGH>;

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

		enable-active-high;

		regulator-enable-ramp-delay = <200000>;

	};

};



&ntn3_vreg {

	vin-supply = <&pine_vreg>;

};



&pcie0 {

	qcom,no-l0s-supported;

	qcom,no-l1-supported;

	qcom,no-l1ss-supported;

	qcom,no-aux-clk-sync;

};



&pcie0_bus2_dev1_fn0 {

	cnss_pci1: cnss_pci1 {

		reg = <0 0 0 0 0>;

		qcom,iommu-group = <&qcn9000_pci_iommu_group_0>;

		memory-region = <&qcn9000_0_mem>;

		qrtr_instance_id = <0x0>;



		#address-cells = <1>;

		#size-cells = <1>;

	};

};



&pcie_i2c_ctrl {

	reg_update = <0x82c030 0x1

			0x828000 0x3

			0x82bd00 0x8

			0x82c030 0x2

			0x828000 0x3

			0x82bd00 0x8

			0x82c030 0x8

			0x828000 0x1

			0x82bd00 0x8

			0x82c01c 0x10

			0x82c030 0xf

			0x828000 0xf

			0x82b268 0x2>;

};



&wifi0 {

	status = "ok";

};



&qcn9000_0_mem {

	status = "ok";

};

qcom/sdxlemur-mtp-cpe.dts

+1 −0
Original line number Diff line number Diff line
@@ -2,6 +2,7 @@ 


#include "sdxlemur.dtsi"

#include "sdxlemur-mtp-cpe.dtsi"

#include "sdxlemur-mtp-cpe-hsp.dtsi"

#include "sdxlemur-1024mb-cpe.dtsi"

#include "sdxlemur-audio.dtsi"

#include "sdxlemur-mtp-audio-overlay.dtsi"

qcom/sdxlemur-mtp-cpe.dtsi

+0 −36
Original line number Diff line number Diff line
@@ -100,7 +100,6 @@ 




&pcie0 {

	qcom,boot-option = <0x1>;

	pcie-i2c-phandle = <&i2c_5>;



	vreg-3p3-supply = <&aqr_vreg>;
@@ -132,14 +131,6 @@ 
		/* BDF 2.2.0 */

		pcie0_bus2_dev2_fn0: pcie0_bus2_dev2_fn0 {

			reg = <0x1000 0x0 0x0 0x0 0x0>;

			cnss_pci0: cnss_pci0 {

				reg = <0 0 0 0 0>;

				qcom,iommu-group = <&cnss_pci_iommu_group>;

				memory-region = <&cnss_wlan_mem>;



				#address-cells = <1>;

				#size-cells = <1>;

			};

		};



		/* BDF 2.3.0 */
@@ -191,30 +182,3 @@ 
		};

	};

};
 


#include "sdxlemur-cnss.dtsi"



&wlan {

	mhi_events {

		mhi_event@0 {

			mhi,num-elements = <32>;

			mhi,intmod = <0>;

			mhi,msi = <1>;

			mhi,priority = <0>;

			mhi,brstmode = <2>;

			mhi,data-type = <1>;

		};



		mhi_event@1 {

			mhi,num-elements = <256>;

			mhi,intmod = <0>;

			mhi,msi = <2>;

			mhi,priority = <1>;

			mhi,brstmode = <2>;

		};



		mhi_event@2 {

			status = "disabled";

		};

	};

};