Loading fw/htt.h +1 −0 Original line number Diff line number Diff line Loading @@ -759,6 +759,7 @@ typedef enum { HTT_DBG_ODD_MANDATORY_MUOFDMA_TAG = 167, /* htt_odd_mandatory_muofdma_pdev_stats_tlv */ HTT_STATS_LATENCY_PROF_CAL_STATS_TAG = 168, /* htt_latency_prof_cal_stats_tlv */ HTT_STATS_TX_PDEV_MUEDCA_PARAMS_STATS_TAG = 169, /* htt_tx_pdev_muedca_params_stats_tlv_v */ HTT_STATS_PDEV_BW_MGR_STATS_TAG = 170, /* htt_pdev_bw_mgr_stats_tlv */ HTT_STATS_MAX_TAG, Loading fw/htt_stats.h +142 −0 Original line number Diff line number Diff line Loading @@ -502,6 +502,14 @@ enum htt_dbg_ext_stats_type { */ HTT_DBG_EXT_PHY_PROF_CAL_STATS = 52, /** HTT_DBG_EXT_STATS_PDEV_BW_MGR * PARAMS: * - No Params * RESP MSG: * - htt_pdev_bw_mgr_stats_t */ HTT_DBG_EXT_STATS_PDEV_BW_MGR = 53, /* keep this last */ HTT_DBG_NUM_EXT_STATS = 256, Loading Loading @@ -8450,5 +8458,139 @@ typedef struct { A_UINT32 chan_acc_lat_based_dlofdma_monitoring_count[HTT_NUM_AC_WMM]; } htt_pdev_sched_algo_ofdma_stats_tlv; /*======= Bandwidth Manager stats ====================*/ #define HTT_BW_MGR_STATS_MAC_ID_M 0x000000ff #define HTT_BW_MGR_STATS_MAC_ID_S 0 #define HTT_BW_MGR_STATS_PRI20_IDX_M 0x0000ff00 #define HTT_BW_MGR_STATS_PRI20_IDX_S 8 #define HTT_BW_MGR_STATS_PRI20_FREQ_M 0xffff0000 #define HTT_BW_MGR_STATS_PRI20_FREQ_S 16 #define HTT_BW_MGR_STATS_CENTER_FREQ1_M 0x0000ffff #define HTT_BW_MGR_STATS_CENTER_FREQ1_S 0 #define HTT_BW_MGR_STATS_CENTER_FREQ2_M 0xffff0000 #define HTT_BW_MGR_STATS_CENTER_FREQ2_S 16 #define HTT_BW_MGR_STATS_CHAN_PHY_MODE_M 0x000000ff #define HTT_BW_MGR_STATS_CHAN_PHY_MODE_S 0 #define HTT_BW_MGR_STATS_STATIC_PATTERN_M 0x00ffff00 #define HTT_BW_MGR_STATS_STATIC_PATTERN_S 8 #define HTT_BW_MGR_STATS_MAC_ID_GET(_var) \ (((_var) & HTT_BW_MGR_STATS_MAC_ID_M) >> \ HTT_BW_MGR_STATS_MAC_ID_S) #define HTT_BW_MGR_STATS_MAC_ID_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_BW_MGR_STATS_MAC_ID, _val); \ ((_var) |= ((_val) << HTT_BW_MGR_STATS_MAC_ID_S)); \ } while (0) #define HTT_BW_MGR_STATS_PRI20_IDX_GET(_var) \ (((_var) & HTT_BW_MGR_STATS_PRI20_IDX_M) >> \ HTT_BW_MGR_STATS_PRI20_IDX_S) #define HTT_BW_MGR_STATS_PRI20_IDX_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_BW_MGR_STATS_PRI20_IDX, _val); \ ((_var) |= ((_val) << HTT_BW_MGR_STATS_PRI20_IDX_S)); \ } while (0) #define HTT_BW_MGR_STATS_PRI20_FREQ_GET(_var) \ (((_var) & HTT_BW_MGR_STATS_PRI20_FREQ_M) >> \ HTT_BW_MGR_STATS_PRI20_FREQ_S) #define HTT_BW_MGR_STATS_PRI20_FREQ_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_BW_MGR_STATS_PRI20_FREQ, _val); \ ((_var) |= ((_val) << HTT_BW_MGR_STATS_PRI20_FREQ_S)); \ } while (0) #define HTT_BW_MGR_STATS_CENTER_FREQ1_GET(_var) \ (((_var) & HTT_BW_MGR_STATS_CENTER_FREQ1_M) >> \ HTT_BW_MGR_STATS_CENTER_FREQ1_S) #define HTT_BW_MGR_STATS_CENTER_FREQ1_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_BW_MGR_STATS_CENTER_FREQ1, _val); \ ((_var) |= ((_val) << HTT_BW_MGR_STATS_CENTER_FREQ1_S)); \ } while (0) #define HTT_BW_MGR_STATS_CENTER_FREQ2_GET(_var) \ (((_var) & HTT_BW_MGR_STATS_CENTER_FREQ2_M) >> \ HTT_BW_MGR_STATS_CENTER_FREQ2_S) #define HTT_BW_MGR_STATS_CENTER_FREQ2_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_BW_MGR_STATS_CENTER_FREQ2, _val); \ ((_var) |= ((_val) << HTT_BW_MGR_STATS_CENTER_FREQ2_S)); \ } while (0) #define HTT_BW_MGR_STATS_CHAN_PHY_MODE_GET(_var) \ (((_var) & HTT_BW_MGR_STATS_CHAN_PHY_MODE_M) >> \ HTT_BW_MGR_STATS_CHAN_PHY_MODE_S) #define HTT_BW_MGR_STATS_CHAN_PHY_MODE_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_BW_MGR_STATS_CHAN_PHY_MODE, _val); \ ((_var) |= ((_val) << HTT_BW_MGR_STATS_CHAN_PHY_MODE_S)); \ } while (0) #define HTT_BW_MGR_STATS_STATIC_PATTERN_GET(_var) \ (((_var) & HTT_BW_MGR_STATS_STATIC_PATTERN_M) >> \ HTT_BW_MGR_STATS_STATIC_PATTERN_S) #define HTT_BW_MGR_STATS_STATIC_PATTERN_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_BW_MGR_STATS_STATIC_PATTERN, _val); \ ((_var) |= ((_val) << HTT_BW_MGR_STATS_STATIC_PATTERN_S)); \ } while (0) typedef struct { htt_tlv_hdr_t tlv_hdr; /* BIT [ 7 : 0] :- mac_id * BIT [ 15 : 8] :- pri20_index * BIT [ 31 : 16] :- pri20_freq in Mhz */ A_UINT32 mac_id__pri20_idx__freq; /* BIT [ 15 : 0] :- centre_freq1 * BIT [ 31 : 16] :- centre_freq2 */ A_UINT32 centre_freq1__freq2; /* BIT [ 7 : 0] :- channel_phy_mode * BIT [ 23 : 8] :- static_pattern */ A_UINT32 phy_mode__static_pattern; } htt_pdev_bw_mgr_stats_tlv; /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_BW_MGR * TLV_TAGS: * - HTT_STATS_PDEV_BW_MGR_STATS_TAG */ /* NOTE: * This structure is for documentation, and cannot be safely used directly. * Instead, use the constituent TLV structures to fill/parse. */ typedef struct { htt_pdev_bw_mgr_stats_tlv bw_mgr_tlv; } htt_pdev_bw_mgr_stats_t; #endif /* __HTT_STATS_H__ */ Loading
fw/htt.h +1 −0 Original line number Diff line number Diff line Loading @@ -759,6 +759,7 @@ typedef enum { HTT_DBG_ODD_MANDATORY_MUOFDMA_TAG = 167, /* htt_odd_mandatory_muofdma_pdev_stats_tlv */ HTT_STATS_LATENCY_PROF_CAL_STATS_TAG = 168, /* htt_latency_prof_cal_stats_tlv */ HTT_STATS_TX_PDEV_MUEDCA_PARAMS_STATS_TAG = 169, /* htt_tx_pdev_muedca_params_stats_tlv_v */ HTT_STATS_PDEV_BW_MGR_STATS_TAG = 170, /* htt_pdev_bw_mgr_stats_tlv */ HTT_STATS_MAX_TAG, Loading
fw/htt_stats.h +142 −0 Original line number Diff line number Diff line Loading @@ -502,6 +502,14 @@ enum htt_dbg_ext_stats_type { */ HTT_DBG_EXT_PHY_PROF_CAL_STATS = 52, /** HTT_DBG_EXT_STATS_PDEV_BW_MGR * PARAMS: * - No Params * RESP MSG: * - htt_pdev_bw_mgr_stats_t */ HTT_DBG_EXT_STATS_PDEV_BW_MGR = 53, /* keep this last */ HTT_DBG_NUM_EXT_STATS = 256, Loading Loading @@ -8450,5 +8458,139 @@ typedef struct { A_UINT32 chan_acc_lat_based_dlofdma_monitoring_count[HTT_NUM_AC_WMM]; } htt_pdev_sched_algo_ofdma_stats_tlv; /*======= Bandwidth Manager stats ====================*/ #define HTT_BW_MGR_STATS_MAC_ID_M 0x000000ff #define HTT_BW_MGR_STATS_MAC_ID_S 0 #define HTT_BW_MGR_STATS_PRI20_IDX_M 0x0000ff00 #define HTT_BW_MGR_STATS_PRI20_IDX_S 8 #define HTT_BW_MGR_STATS_PRI20_FREQ_M 0xffff0000 #define HTT_BW_MGR_STATS_PRI20_FREQ_S 16 #define HTT_BW_MGR_STATS_CENTER_FREQ1_M 0x0000ffff #define HTT_BW_MGR_STATS_CENTER_FREQ1_S 0 #define HTT_BW_MGR_STATS_CENTER_FREQ2_M 0xffff0000 #define HTT_BW_MGR_STATS_CENTER_FREQ2_S 16 #define HTT_BW_MGR_STATS_CHAN_PHY_MODE_M 0x000000ff #define HTT_BW_MGR_STATS_CHAN_PHY_MODE_S 0 #define HTT_BW_MGR_STATS_STATIC_PATTERN_M 0x00ffff00 #define HTT_BW_MGR_STATS_STATIC_PATTERN_S 8 #define HTT_BW_MGR_STATS_MAC_ID_GET(_var) \ (((_var) & HTT_BW_MGR_STATS_MAC_ID_M) >> \ HTT_BW_MGR_STATS_MAC_ID_S) #define HTT_BW_MGR_STATS_MAC_ID_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_BW_MGR_STATS_MAC_ID, _val); \ ((_var) |= ((_val) << HTT_BW_MGR_STATS_MAC_ID_S)); \ } while (0) #define HTT_BW_MGR_STATS_PRI20_IDX_GET(_var) \ (((_var) & HTT_BW_MGR_STATS_PRI20_IDX_M) >> \ HTT_BW_MGR_STATS_PRI20_IDX_S) #define HTT_BW_MGR_STATS_PRI20_IDX_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_BW_MGR_STATS_PRI20_IDX, _val); \ ((_var) |= ((_val) << HTT_BW_MGR_STATS_PRI20_IDX_S)); \ } while (0) #define HTT_BW_MGR_STATS_PRI20_FREQ_GET(_var) \ (((_var) & HTT_BW_MGR_STATS_PRI20_FREQ_M) >> \ HTT_BW_MGR_STATS_PRI20_FREQ_S) #define HTT_BW_MGR_STATS_PRI20_FREQ_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_BW_MGR_STATS_PRI20_FREQ, _val); \ ((_var) |= ((_val) << HTT_BW_MGR_STATS_PRI20_FREQ_S)); \ } while (0) #define HTT_BW_MGR_STATS_CENTER_FREQ1_GET(_var) \ (((_var) & HTT_BW_MGR_STATS_CENTER_FREQ1_M) >> \ HTT_BW_MGR_STATS_CENTER_FREQ1_S) #define HTT_BW_MGR_STATS_CENTER_FREQ1_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_BW_MGR_STATS_CENTER_FREQ1, _val); \ ((_var) |= ((_val) << HTT_BW_MGR_STATS_CENTER_FREQ1_S)); \ } while (0) #define HTT_BW_MGR_STATS_CENTER_FREQ2_GET(_var) \ (((_var) & HTT_BW_MGR_STATS_CENTER_FREQ2_M) >> \ HTT_BW_MGR_STATS_CENTER_FREQ2_S) #define HTT_BW_MGR_STATS_CENTER_FREQ2_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_BW_MGR_STATS_CENTER_FREQ2, _val); \ ((_var) |= ((_val) << HTT_BW_MGR_STATS_CENTER_FREQ2_S)); \ } while (0) #define HTT_BW_MGR_STATS_CHAN_PHY_MODE_GET(_var) \ (((_var) & HTT_BW_MGR_STATS_CHAN_PHY_MODE_M) >> \ HTT_BW_MGR_STATS_CHAN_PHY_MODE_S) #define HTT_BW_MGR_STATS_CHAN_PHY_MODE_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_BW_MGR_STATS_CHAN_PHY_MODE, _val); \ ((_var) |= ((_val) << HTT_BW_MGR_STATS_CHAN_PHY_MODE_S)); \ } while (0) #define HTT_BW_MGR_STATS_STATIC_PATTERN_GET(_var) \ (((_var) & HTT_BW_MGR_STATS_STATIC_PATTERN_M) >> \ HTT_BW_MGR_STATS_STATIC_PATTERN_S) #define HTT_BW_MGR_STATS_STATIC_PATTERN_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_BW_MGR_STATS_STATIC_PATTERN, _val); \ ((_var) |= ((_val) << HTT_BW_MGR_STATS_STATIC_PATTERN_S)); \ } while (0) typedef struct { htt_tlv_hdr_t tlv_hdr; /* BIT [ 7 : 0] :- mac_id * BIT [ 15 : 8] :- pri20_index * BIT [ 31 : 16] :- pri20_freq in Mhz */ A_UINT32 mac_id__pri20_idx__freq; /* BIT [ 15 : 0] :- centre_freq1 * BIT [ 31 : 16] :- centre_freq2 */ A_UINT32 centre_freq1__freq2; /* BIT [ 7 : 0] :- channel_phy_mode * BIT [ 23 : 8] :- static_pattern */ A_UINT32 phy_mode__static_pattern; } htt_pdev_bw_mgr_stats_tlv; /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_BW_MGR * TLV_TAGS: * - HTT_STATS_PDEV_BW_MGR_STATS_TAG */ /* NOTE: * This structure is for documentation, and cannot be safely used directly. * Instead, use the constituent TLV structures to fill/parse. */ typedef struct { htt_pdev_bw_mgr_stats_tlv bw_mgr_tlv; } htt_pdev_bw_mgr_stats_t; #endif /* __HTT_STATS_H__ */