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Commit 8cc7117e authored by Michael Hennerich's avatar Michael Hennerich Committed by Bryan Wu
Browse files

Blackfin arch: Add new board support for ADZS-BF526-EZ-BRD 



Signed-off-by: default avatarMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: default avatarBryan Wu <cooloney@kernel.org>
parent 31f3d4a3

arch/blackfin/Kconfig

+10 −3
Original line number Diff line number Diff line
@@ -249,7 +249,7 @@ config MEM_MT48LC8M32B2B5_7 


config MEM_MT48LC32M16A2TG_75

	bool

	depends on (BFIN527_EZKIT || BFIN532_IP0X || BLACKSTAMP)

	depends on (BFIN527_EZKIT || BFIN532_IP0X || BLACKSTAMP || BFIN526_EZBRD)

	default y



source "arch/blackfin/mach-bf527/Kconfig"
@@ -286,13 +286,20 @@ config BOOT_LOAD 
	  memory region is used to capture NULL pointer references as well

	  as some core kernel functions.



config ROM_BASE

	hex "Kernel ROM Base"

	default "0x20040000"

	range 0x20000000 0x20400000 if !(BF54x || BF561)

	range 0x20000000 0x30000000 if (BF54x || BF561)

	help



comment "Clock/PLL Setup"



config CLKIN_HZ

	int "Frequency of the crystal on the board in Hz"

	default "11059200" if BFIN533_STAMP

	default "27000000" if BFIN533_EZKIT

	default "25000000" if (BFIN537_STAMP || BFIN527_EZKIT || H8606_HVSISTEMAS || BLACKSTAMP)

	default "25000000" if (BFIN537_STAMP || BFIN527_EZKIT || H8606_HVSISTEMAS || BLACKSTAMP || BFIN526_EZBRD)

	default "30000000" if BFIN561_EZKIT

	default "24576000" if PNAV10

	default "10000000" if BFIN532_IP0X
@@ -332,7 +339,7 @@ config VCO_MULT 
	default "22" if BFIN533_BLUETECHNIX_CM

	default "20" if (BFIN537_BLUETECHNIX_CM || BFIN527_BLUETECHNIX_CM || BFIN561_BLUETECHNIX_CM)

	default "20" if BFIN561_EZKIT

	default "16" if (H8606_HVSISTEMAS || BLACKSTAMP)

	default "16" if (H8606_HVSISTEMAS || BLACKSTAMP || BFIN526_EZBRD)

	help

	  This controls the frequency of the on-chip PLL. This can be between 1 and 64.

	  PLL Frequency = (Crystal Frequency) * (this setting)

arch/blackfin/configs/BF526-EZBRD_defconfig

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+1427 −0

File added.

Preview size limit exceeded, changes collapsed.

arch/blackfin/mach-bf527/boards/Kconfig

+5 −0
Original line number Diff line number Diff line
@@ -14,4 +14,9 @@ config BFIN527_BLUETECHNIX_CM 
	help

	  CM-BF527 support for EVAL- and DEV-Board.



config BFIN526_EZBRD

	bool "BF526-EZBRD"

	help

	  BF526-EZBRD/EZKIT Lite board support.



endchoice

arch/blackfin/mach-bf527/boards/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -4,3 +4,4 @@ 


obj-$(CONFIG_BFIN527_EZKIT)            += ezkit.o

obj-$(CONFIG_BFIN527_BLUETECHNIX_CM)   += cm_bf527.o

obj-$(CONFIG_BFIN526_EZBRD)            += ezbrd.o

arch/blackfin/mach-bf527/boards/ezbrd.c

0 → 100644
+734 −0
Original line number Diff line number Diff line 
/*

 * File:         arch/blackfin/mach-bf527/boards/ezbrd.c

 * Based on:     arch/blackfin/mach-bf537/boards/stamp.c

 * Author:       Aidan Williams <aidan@nicta.com.au>

 *

 * Created:

 * Description:

 *

 * Modified:

 *               Copyright 2005 National ICT Australia (NICTA)

 *               Copyright 2004-2008 Analog Devices Inc.

 *

 * Bugs:         Enter bugs at http://blackfin.uclinux.org/

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; if not, see the file COPYING, or write

 * to the Free Software Foundation, Inc.,

 * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA

 */



#include <linux/device.h>

#include <linux/platform_device.h>

#include <linux/mtd/mtd.h>

#include <linux/mtd/partitions.h>

#include <linux/mtd/physmap.h>

#include <linux/spi/spi.h>

#include <linux/spi/flash.h>



#include <linux/i2c.h>

#include <linux/irq.h>

#include <linux/interrupt.h>

#include <linux/usb/musb.h>

#include <asm/dma.h>

#include <asm/bfin5xx_spi.h>

#include <asm/reboot.h>

#include <asm/nand.h>

#include <asm/portmux.h>

#include <asm/dpmc.h>

#include <linux/spi/ad7877.h>



/*

 * Name the Board for the /proc/cpuinfo

 */

const char bfin_board_name[] = "BF526-EZBRD";



/*

 *  Driver needs to know address, irq and flag pin.

 */



#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)

static struct resource musb_resources[] = {

	[0] = {

		.start	= 0xffc03800,

		.end	= 0xffc03cff,

		.flags	= IORESOURCE_MEM,

	},

	[1] = {	/* general IRQ */

		.start	= IRQ_USB_INT0,

		.end	= IRQ_USB_INT0,

		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,

	},

	[2] = {	/* DMA IRQ */

		.start	= IRQ_USB_DMA,

		.end	= IRQ_USB_DMA,

		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,

	},

};



static struct musb_hdrc_config musb_config = {

	.multipoint	= 0,

	.dyn_fifo	= 0,

	.soft_con	= 1,

	.dma		= 1,

	.num_eps	= 7,

	.dma_channels	= 7,

	.gpio_vrsel	= GPIO_PG13,

};



static struct musb_hdrc_platform_data musb_plat = {

#if defined(CONFIG_USB_MUSB_OTG)

	.mode		= MUSB_OTG,

#elif defined(CONFIG_USB_MUSB_HDRC_HCD)

	.mode		= MUSB_HOST,

#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)

	.mode		= MUSB_PERIPHERAL,

#endif

	.config		= &musb_config,

};



static u64 musb_dmamask = ~(u32)0;



static struct platform_device musb_device = {

	.name		= "musb_hdrc",

	.id		= 0,

	.dev = {

		.dma_mask		= &musb_dmamask,

		.coherent_dma_mask	= 0xffffffff,

		.platform_data		= &musb_plat,

	},

	.num_resources	= ARRAY_SIZE(musb_resources),

	.resource	= musb_resources,

};

#endif



#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)

static struct mtd_partition ezbrd_partitions[] = {

	{

		.name       = "bootloader(nor)",

		.size       = 0x40000,

		.offset     = 0,

	}, {

		.name       = "linux kernel(nor)",

		.size       = 0x1C0000,

		.offset     = MTDPART_OFS_APPEND,

	}, {

		.name       = "file system(nor)",

		.size       = MTDPART_SIZ_FULL,

		.offset     = MTDPART_OFS_APPEND,

	}

};



static struct physmap_flash_data ezbrd_flash_data = {

	.width      = 2,

	.parts      = ezbrd_partitions,

	.nr_parts   = ARRAY_SIZE(ezbrd_partitions),

};



static struct resource ezbrd_flash_resource = {

	.start = 0x20000000,

	.end   = 0x203fffff,

	.flags = IORESOURCE_MEM,

};



static struct platform_device ezbrd_flash_device = {

	.name          = "physmap-flash",

	.id            = 0,

	.dev = {

		.platform_data = &ezbrd_flash_data,

	},

	.num_resources = 1,

	.resource      = &ezbrd_flash_resource,

};

#endif



#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)

static struct mtd_partition partition_info[] = {

	{

		.name = "linux kernel(nand)",

		.offset = 0,

		.size = 4 * 1024 * 1024,

	},

	{

		.name = "file system(nand)",

		.offset = MTDPART_OFS_APPEND,

		.size = MTDPART_SIZ_FULL,

	},

};



static struct bf5xx_nand_platform bf5xx_nand_platform = {

	.page_size = NFC_PG_SIZE_256,

	.data_width = NFC_NWIDTH_8,

	.partitions = partition_info,

	.nr_partitions = ARRAY_SIZE(partition_info),

	.rd_dly = 3,

	.wr_dly = 3,

};



static struct resource bf5xx_nand_resources[] = {

	{

		.start = NFC_CTL,

		.end = NFC_DATA_RD + 2,

		.flags = IORESOURCE_MEM,

	},

	{

		.start = CH_NFC,

		.end = CH_NFC,

		.flags = IORESOURCE_IRQ,

	},

};



static struct platform_device bf5xx_nand_device = {

	.name = "bf5xx-nand",

	.id = 0,

	.num_resources = ARRAY_SIZE(bf5xx_nand_resources),

	.resource = bf5xx_nand_resources,

	.dev = {

		.platform_data = &bf5xx_nand_platform,

	},

};

#endif



#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)

static struct platform_device rtc_device = {

	.name = "rtc-bfin",

	.id   = -1,

};

#endif





#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)

static struct platform_device bfin_mac_device = {

	.name = "bfin_mac",

};

#endif



#if defined(CONFIG_MTD_M25P80) \

	|| defined(CONFIG_MTD_M25P80_MODULE)

static struct mtd_partition bfin_spi_flash_partitions[] = {

	{

		.name = "bootloader(spi)",

		.size = 0x00040000,

		.offset = 0,

		.mask_flags = MTD_CAP_ROM

	}, {

		.name = "linux kernel(spi)",

		.size = MTDPART_SIZ_FULL,

		.offset = MTDPART_OFS_APPEND,

	}

};



static struct flash_platform_data bfin_spi_flash_data = {

	.name = "m25p80",

	.parts = bfin_spi_flash_partitions,

	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),

	.type = "m25p16",

};



/* SPI flash chip (m25p64) */

static struct bfin5xx_spi_chip spi_flash_chip_info = {

	.enable_dma = 0,         /* use dma transfer with this chip*/

	.bits_per_word = 8,

};

#endif



#if defined(CONFIG_SPI_ADC_BF533) \

	|| defined(CONFIG_SPI_ADC_BF533_MODULE)

/* SPI ADC chip */

static struct bfin5xx_spi_chip spi_adc_chip_info = {

	.enable_dma = 1,         /* use dma transfer with this chip*/

	.bits_per_word = 16,

};

#endif



#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)

static struct bfin5xx_spi_chip spi_mmc_chip_info = {

	.enable_dma = 1,

	.bits_per_word = 8,

};

#endif



#if defined(CONFIG_PBX)

static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {

	.ctl_reg	= 0x4, /* send zero */

	.enable_dma	= 0,

	.bits_per_word	= 8,

	.cs_change_per_word = 1,

};

#endif



#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)

static struct bfin5xx_spi_chip spi_ad7877_chip_info = {

	.enable_dma = 0,

	.bits_per_word = 16,

};



static const struct ad7877_platform_data bfin_ad7877_ts_info = {

	.model			= 7877,

	.vref_delay_usecs	= 50,	/* internal, no capacitor */

	.x_plate_ohms		= 419,

	.y_plate_ohms		= 486,

	.pressure_max		= 1000,

	.pressure_min		= 0,

	.stopacq_polarity 	= 1,

	.first_conversion_delay = 3,

	.acquisition_time 	= 1,

	.averaging 		= 1,

	.pen_down_acc_interval 	= 1,

};

#endif



#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \

	 && defined(CONFIG_SND_SOC_WM8731_SPI)

static struct bfin5xx_spi_chip spi_wm8731_chip_info = {

	.enable_dma = 0,

	.bits_per_word = 16,

};

#endif



#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)

static struct bfin5xx_spi_chip spidev_chip_info = {

	.enable_dma = 0,

	.bits_per_word = 8,

};

#endif



#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)

static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {

	.enable_dma = 0,

	.bits_per_word = 8,

};

#endif



static struct spi_board_info bfin_spi_board_info[] __initdata = {

#if defined(CONFIG_MTD_M25P80) \

	|| defined(CONFIG_MTD_M25P80_MODULE)

	{

		/* the modalias must be the same as spi device driver name */

		.modalias = "m25p80", /* Name of spi_driver for this device */

		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */

		.bus_num = 0, /* Framework bus number */

		.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/

		.platform_data = &bfin_spi_flash_data,

		.controller_data = &spi_flash_chip_info,

		.mode = SPI_MODE_3,

	},

#endif



#if defined(CONFIG_SPI_ADC_BF533) \

	|| defined(CONFIG_SPI_ADC_BF533_MODULE)

	{

		.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */

		.max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */

		.bus_num = 0, /* Framework bus number */

		.chip_select = 1, /* Framework chip select. */

		.platform_data = NULL, /* No spi_driver specific config */

		.controller_data = &spi_adc_chip_info,

	},

#endif



#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)

	{

		.modalias = "spi_mmc_dummy",

		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */

		.bus_num = 0,

		.chip_select = 0,

		.platform_data = NULL,

		.controller_data = &spi_mmc_chip_info,

		.mode = SPI_MODE_3,

	},

	{

		.modalias = "spi_mmc",

		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */

		.bus_num = 0,

		.chip_select = CONFIG_SPI_MMC_CS_CHAN,

		.platform_data = NULL,

		.controller_data = &spi_mmc_chip_info,

		.mode = SPI_MODE_3,

	},

#endif

#if defined(CONFIG_PBX)

	{

		.modalias = "fxs-spi",

		.max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */

		.bus_num = 0,

		.chip_select = 8 - CONFIG_J11_JUMPER,

		.controller_data = &spi_si3xxx_chip_info,

		.mode = SPI_MODE_3,

	},

	{

		.modalias = "fxo-spi",

		.max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */

		.bus_num = 0,

		.chip_select = 8 - CONFIG_J19_JUMPER,

		.controller_data = &spi_si3xxx_chip_info,

		.mode = SPI_MODE_3,

	},

#endif

#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)

	{

		.modalias		= "ad7877",

		.platform_data		= &bfin_ad7877_ts_info,

		.irq			= IRQ_PF8,

		.max_speed_hz	= 12500000,     /* max spi clock (SCK) speed in HZ */

		.bus_num	= 0,

		.chip_select  = 2,

		.controller_data = &spi_ad7877_chip_info,

	},

#endif

#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \

	 && defined(CONFIG_SND_SOC_WM8731_SPI)

	{

		.modalias	= "wm8731",

		.max_speed_hz	= 3125000,     /* max spi clock (SCK) speed in HZ */

		.bus_num	= 0,

		.chip_select    = 5,

		.controller_data = &spi_wm8731_chip_info,

		.mode = SPI_MODE_0,

	},

#endif

#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)

	{

		.modalias = "spidev",

		.max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */

		.bus_num = 0,

		.chip_select = 1,

		.controller_data = &spidev_chip_info,

	},

#endif

#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)

	{

		.modalias = "bfin-lq035q1-spi",

		.max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */

		.bus_num = 0,

		.chip_select = 1,

		.controller_data = &lq035q1_spi_chip_info,

		.mode = SPI_CPHA | SPI_CPOL,

	},

#endif

};



#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)

/* SPI controller data */

static struct bfin5xx_spi_master bfin_spi0_info = {

	.num_chipselect = 8,

	.enable_dma = 1,  /* master has the ability to do dma transfer */

	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},

};



/* SPI (0) */

static struct resource bfin_spi0_resource[] = {

	[0] = {

		.start = SPI0_REGBASE,

		.end   = SPI0_REGBASE + 0xFF,

		.flags = IORESOURCE_MEM,

		},

	[1] = {

		.start = CH_SPI,

		.end   = CH_SPI,

		.flags = IORESOURCE_IRQ,

	},

};



static struct platform_device bfin_spi0_device = {

	.name = "bfin-spi",

	.id = 0, /* Bus number */

	.num_resources = ARRAY_SIZE(bfin_spi0_resource),

	.resource = bfin_spi0_resource,

	.dev = {

		.platform_data = &bfin_spi0_info, /* Passed to driver */

	},

};

#endif  /* spi master and devices */



#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)

static struct resource bfin_uart_resources[] = {

#ifdef CONFIG_SERIAL_BFIN_UART0

	{

		.start = 0xFFC00400,

		.end = 0xFFC004FF,

		.flags = IORESOURCE_MEM,

	},

#endif

#ifdef CONFIG_SERIAL_BFIN_UART1

	{

		.start = 0xFFC02000,

		.end = 0xFFC020FF,

		.flags = IORESOURCE_MEM,

	},

#endif

};



static struct platform_device bfin_uart_device = {

	.name = "bfin-uart",

	.id = 1,

	.num_resources = ARRAY_SIZE(bfin_uart_resources),

	.resource = bfin_uart_resources,

};

#endif



#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)

static struct resource bfin_sir_resources[] = {

#ifdef CONFIG_BFIN_SIR0

	{

		.start = 0xFFC00400,

		.end = 0xFFC004FF,

		.flags = IORESOURCE_MEM,

	},

#endif

#ifdef CONFIG_BFIN_SIR1

	{

		.start = 0xFFC02000,

		.end = 0xFFC020FF,

		.flags = IORESOURCE_MEM,

	},

#endif

};



static struct platform_device bfin_sir_device = {

	.name = "bfin_sir",

	.id = 0,

	.num_resources = ARRAY_SIZE(bfin_sir_resources),

	.resource = bfin_sir_resources,

};

#endif



#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)

static struct resource bfin_twi0_resource[] = {

	[0] = {

		.start = TWI0_REGBASE,

		.end   = TWI0_REGBASE,

		.flags = IORESOURCE_MEM,

	},

	[1] = {

		.start = IRQ_TWI,

		.end   = IRQ_TWI,

		.flags = IORESOURCE_IRQ,

	},

};



static struct platform_device i2c_bfin_twi_device = {

	.name = "i2c-bfin-twi",

	.id = 0,

	.num_resources = ARRAY_SIZE(bfin_twi0_resource),

	.resource = bfin_twi0_resource,

};

#endif



#ifdef CONFIG_I2C_BOARDINFO

static struct i2c_board_info __initdata bfin_i2c_board_info[] = {

#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)

	{

		I2C_BOARD_INFO("pcf8574_lcd", 0x22),

	},

#endif

#if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)

	{

		I2C_BOARD_INFO("pcf8574_keypad", 0x27),

		.irq = IRQ_PF8,

	},

#endif

};

#endif



#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)

static struct platform_device bfin_sport0_uart_device = {

	.name = "bfin-sport-uart",

	.id = 0,

};



static struct platform_device bfin_sport1_uart_device = {

	.name = "bfin-sport-uart",

	.id = 1,

};

#endif



#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)

#include <linux/input.h>

#include <linux/gpio_keys.h>



static struct gpio_keys_button bfin_gpio_keys_table[] = {

	{BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},

	{BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},

};



static struct gpio_keys_platform_data bfin_gpio_keys_data = {

	.buttons        = bfin_gpio_keys_table,

	.nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),

};



static struct platform_device bfin_device_gpiokeys = {

	.name      = "gpio-keys",

	.dev = {

		.platform_data = &bfin_gpio_keys_data,

	},

};

#endif



static struct resource bfin_gpios_resources = {

	.start = 0,

	.end   = MAX_BLACKFIN_GPIOS - 1,

	.flags = IORESOURCE_IRQ,

};



static struct platform_device bfin_gpios_device = {

	.name = "simple-gpio",

	.id = -1,

	.num_resources = 1,

	.resource = &bfin_gpios_resources,

};



static const unsigned int cclk_vlev_datasheet[] =

{

	VRPAIR(VLEV_100, 400000000),

	VRPAIR(VLEV_105, 426000000),

	VRPAIR(VLEV_110, 500000000),

	VRPAIR(VLEV_115, 533000000),

	VRPAIR(VLEV_120, 600000000),

};



static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {

	.tuple_tab = cclk_vlev_datasheet,

	.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),

	.vr_settling_time = 25 /* us */,

};



static struct platform_device bfin_dpmc = {

	.name = "bfin dpmc",

	.dev = {

		.platform_data = &bfin_dmpc_vreg_data,

	},

};



#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)

#include <asm/bfin-lq035q1.h>



static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {

	.mode = 	LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,

	.use_bl = 	1,

	.gpio_bl =	GPIO_PG12,

};



static struct resource bfin_lq035q1_resources[] = {

	{

		.start = IRQ_PPI_ERROR,

		.end = IRQ_PPI_ERROR,

		.flags = IORESOURCE_IRQ,

	},

};



static struct platform_device bfin_lq035q1_device = {

	.name		= "bfin-lq035q1",

	.id		= -1,

	.num_resources 	= ARRAY_SIZE(bfin_lq035q1_resources),

	.resource 	= bfin_lq035q1_resources,

	.dev		= {

		.platform_data = &bfin_lq035q1_data,

	},

};

#endif



static struct platform_device *stamp_devices[] __initdata = {



	&bfin_dpmc,



#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)

	&bf5xx_nand_device,

#endif



#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)

	&rtc_device,

#endif



#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)

	&musb_device,

#endif



#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)

	&bfin_mac_device,

#endif



#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)

	&bfin_spi0_device,

#endif



#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)

	&bfin_uart_device,

#endif



#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)

	&bfin_lq035q1_device,

#endif



#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)

	&bfin_sir_device,

#endif



#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)

	&i2c_bfin_twi_device,

#endif



#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)

	&bfin_sport0_uart_device,

	&bfin_sport1_uart_device,

#endif



#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)

	&bfin_device_gpiokeys,

#endif



#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)

	&ezbrd_flash_device,

#endif



	&bfin_gpios_device,

};



static int __init stamp_init(void)

{

	printk(KERN_INFO "%s(): registering device resources\n", __func__);



#ifdef CONFIG_I2C_BOARDINFO

	i2c_register_board_info(0, bfin_i2c_board_info,

				ARRAY_SIZE(bfin_i2c_board_info));

#endif



	platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));

	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));

	return 0;

}



arch_initcall(stamp_init);



void native_machine_restart(char *cmd)

{

	/* workaround reboot hang when booting from SPI */

	if ((bfin_read_SYSCR() & 0x7) == 0x3)

		bfin_gpio_reset_spi0_ssel1();

}



void bfin_get_ether_addr(char *addr)

{

	/* the MAC is stored in OTP memory page 0xDF */

	u32 ret;

	u64 otp_mac;

	u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;



	ret = otp_read(0xDF, 0x00, &otp_mac);

	if (!(ret & 0x1)) {

		char *otp_mac_p = (char *)&otp_mac;

		for (ret = 0; ret < 6; ++ret)

			addr[ret] = otp_mac_p[5 - ret];

	}

}

EXPORT_SYMBOL(bfin_get_ether_addr);