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Commit 8c1e3d2b authored by Jeremy Linton's avatar Jeremy Linton Committed by Will Deacon
Browse files

arm64: Always enable spectre-v2 vulnerability detection 



Ensure we are always able to detect whether or not the CPU is affected
by Spectre-v2, so that we can later advertise this to userspace.

Signed-off-by: default avatarJeremy Linton <jeremy.linton@arm.com>
Reviewed-by: default avatarAndre Przywara <andre.przywara@arm.com>
Reviewed-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Tested-by: default avatarStefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent 517953c2

arch/arm64/kernel/cpu_errata.c

+8 −7
Original line number Diff line number Diff line
@@ -109,7 +109,6 @@ cpu_enable_trap_ctr_access(const struct arm64_cpu_capabilities *__unused) 


atomic_t arm64_el2_vector_last_slot = ATOMIC_INIT(-1);



#ifdef CONFIG_HARDEN_BRANCH_PREDICTOR

#include <asm/mmu_context.h>

#include <asm/cacheflush.h>
@@ -270,11 +269,11 @@ static int detect_harden_bp_fw(void) 
	    ((midr & MIDR_CPU_MODEL_MASK) == MIDR_QCOM_FALKOR_V1))

		cb = qcom_link_stack_sanitization;



	if (IS_ENABLED(CONFIG_HARDEN_BRANCH_PREDICTOR))

		install_bp_hardening_cb(cb, smccc_start, smccc_end);



	return 1;

}

#endif	/* CONFIG_HARDEN_BRANCH_PREDICTOR */



#ifdef CONFIG_ARM64_SSBD

DEFINE_PER_CPU_READ_MOSTLY(u64, arm64_ssbd_callback_required);
@@ -513,7 +512,6 @@ cpu_enable_cache_maint_trap(const struct arm64_cpu_capabilities *__unused) 
	.type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM,			\

	CAP_MIDR_RANGE_LIST(midr_list)



#ifdef CONFIG_HARDEN_BRANCH_PREDICTOR

/*

 * List of CPUs that do not need any Spectre-v2 mitigation at all.

 */
@@ -545,6 +543,12 @@ check_branch_predictor(const struct arm64_cpu_capabilities *entry, int scope) 
	if (!need_wa)

		return false;



	if (!IS_ENABLED(CONFIG_HARDEN_BRANCH_PREDICTOR)) {

		pr_warn_once("spectrev2 mitigation disabled by kernel configuration\n");

		__hardenbp_enab = false;

		return false;

	}



	/* forced off */

	if (__nospectre_v2) {

		pr_info_once("spectrev2 mitigation disabled by command line option\n");
@@ -556,7 +560,6 @@ check_branch_predictor(const struct arm64_cpu_capabilities *entry, int scope) 


	return (need_wa > 0);

}

#endif



#ifdef CONFIG_HARDEN_EL2_VECTORS
@@ -731,13 +734,11 @@ const struct arm64_cpu_capabilities arm64_errata[] = { 
		ERRATA_MIDR_ALL_VERSIONS(MIDR_CORTEX_A73),

	},

#endif

#ifdef CONFIG_HARDEN_BRANCH_PREDICTOR

	{

		.capability = ARM64_HARDEN_BRANCH_PREDICTOR,

		.type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM,

		.matches = check_branch_predictor,

	},

#endif

#ifdef CONFIG_HARDEN_EL2_VECTORS

	{

		.desc = "EL2 vector hardening",