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Commit 8bea7d61 authored by Lijuan Gao's avatar Lijuan Gao
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ARM: dts: msm: Enable L1SS sleep for p-v2.1 

PCIe0 phy on v2.1 manages the phy PLL properly hence
remove the software workaround to keep the phy PLL
always on.

Change-Id: I435a5776a75b6613d93f47d46ced65e0080b3a94
parent 871d2e48

qcom/lahainap-v2.1.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 
};



&pcie0 {

	qcom,l1ss-sleep-disable = <0x0>;

	qcom,pcie-phy-ver = <21101>;

	qcom,phy-sequence = <0x0240 0x03 0x0

			0x0094 0x08 0x0