Merge branch 'for-4.18-vsprintf-pcr-removal' into for-4.18 (8bafa2a4) · Commits · e / devices / android_kernel_fairphone_FP5

Documentation/core-api/printk-formats.rst

+1 −2

Original line number	Original line	Diff line number	Diff line
	@@ -419,11 +419,10 @@ struct clk

	%pC pll1		%pC pll1
	%pCn pll1		%pCn pll1
	%pCr 1560000000

	For printing struct clk structures. %pC and %pCn print the name		For printing struct clk structures. %pC and %pCn print the name
	(Common Clock Framework) or address (legacy clock framework) of the		(Common Clock Framework) or address (legacy clock framework) of the
	structure; %pCr prints the current clock rate.		structure.

	Passed by reference.		Passed by reference.

+5 −4

Original line number	Original line	Diff line number	Diff line
	@@ -258,8 +258,9 @@ struct clk cpg_mssr_clk_src_twocell_get(struct of_phandle_args clkspec,
	dev_err(dev, "Cannot get %s clock %u: %ld", type, clkidx,		dev_err(dev, "Cannot get %s clock %u: %ld", type, clkidx,
	PTR_ERR(clk));		PTR_ERR(clk));
	else		else
	dev_dbg(dev, "clock (%u, %u) is %pC at %pCr Hz\n",		dev_dbg(dev, "clock (%u, %u) is %pC at %lu Hz\n",
	clkspec->args[0], clkspec->args[1], clk, clk);		clkspec->args[0], clkspec->args[1], clk,
			clk_get_rate(clk));
	return clk;		return clk;
	}		}

	@@ -326,7 +327,7 @@ static void __init cpg_mssr_register_core_clk(const struct cpg_core_clk *core,
	if (IS_ERR_OR_NULL(clk))		if (IS_ERR_OR_NULL(clk))
	goto fail;		goto fail;

	dev_dbg(dev, "Core clock %pC at %pCr Hz\n", clk, clk);		dev_dbg(dev, "Core clock %pC at %lu Hz\n", clk, clk_get_rate(clk));
	priv->clks[id] = clk;		priv->clks[id] = clk;
	return;		return;

	@@ -392,7 +393,7 @@ static void __init cpg_mssr_register_mod_clk(const struct mssr_mod_clk *mod,
	if (IS_ERR(clk))		if (IS_ERR(clk))
	goto fail;		goto fail;

	dev_dbg(dev, "Module clock %pC at %pCr Hz\n", clk, clk);		dev_dbg(dev, "Module clock %pC at %lu Hz\n", clk, clk_get_rate(clk));
	priv->clks[id] = clk;		priv->clks[id] = clk;
	priv->smstpcr_saved[clock->index / 32].mask \|= BIT(clock->index % 32);		priv->smstpcr_saved[clock->index / 32].mask \|= BIT(clock->index % 32);
	return;		return;

+2 −2

Original line number	Original line	Diff line number	Diff line
	@@ -213,8 +213,8 @@ static int bcm2835_thermal_probe(struct platform_device *pdev)
	rate = clk_get_rate(data->clk);		rate = clk_get_rate(data->clk);
	if ((rate < 1920000) \|\| (rate > 5000000))		if ((rate < 1920000) \|\| (rate > 5000000))
	dev_warn(&pdev->dev,		dev_warn(&pdev->dev,
	"Clock %pCn running at %pCr Hz is outside of the recommended range: 1.92 to 5MHz\n",		"Clock %pCn running at %lu Hz is outside of the recommended range: 1.92 to 5MHz\n",
	data->clk, data->clk);		data->clk, rate);

	/* register of thermal sensor and get info from DT */		/* register of thermal sensor and get info from DT */
	tz = thermal_zone_of_sensor_register(&pdev->dev, 0, data,		tz = thermal_zone_of_sensor_register(&pdev->dev, 0, data,

+2 −2

Original line number	Original line	Diff line number	Diff line
	@@ -2704,8 +2704,8 @@ static int sci_init_clocks(struct sci_port sci_port, struct device dev)
	dev_dbg(dev, "failed to get %s (%ld)\n", clk_names[i],		dev_dbg(dev, "failed to get %s (%ld)\n", clk_names[i],
	PTR_ERR(clk));		PTR_ERR(clk));
	else		else
	dev_dbg(dev, "clk %s is %pC rate %pCr\n", clk_names[i],		dev_dbg(dev, "clk %s is %pC rate %lu\n", clk_names[i],
	clk, clk);		clk, clk_get_rate(clk));
	sci_port->clks[i] = IS_ERR(clk) ? NULL : clk;		sci_port->clks[i] = IS_ERR(clk) ? NULL : clk;
	}		}
	return 0;		return 0;

+0 −3

Original line number	Original line	Diff line number	Diff line
	@@ -1459,9 +1459,6 @@ char clock(char buf, char end, struct clk clk, struct printf_spec spec,
	return string(buf, end, NULL, spec);		return string(buf, end, NULL, spec);

	switch (fmt[1]) {		switch (fmt[1]) {
	case 'r':
	return number(buf, end, clk_get_rate(clk), spec);

	case 'n':		case 'n':
	default:		default:
	#ifdef CONFIG_COMMON_CLK		#ifdef CONFIG_COMMON_CLK