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Commit 8b8fbd39 authored by Cory Maccarrone's avatar Cory Maccarrone Committed by Tony Lindgren
Browse files

omap1: omap7xx clocks, mux, serial fixes 



This change adds in the necessary clocks and mux pins for UART
control on omap7xx devices.  I also made a change in the serial
code to only try and initialize two UARTs in omap_serial_init, as
these devices don't have three.

Signed-off-by: default avatarCory Maccarrone <darkstar6262@gmail.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 35ddf7c0

arch/arm/mach-omap1/clock_data.c

+20 −0
Original line number Diff line number Diff line
@@ -478,6 +478,24 @@ static struct clk usb_dc_ck7xx = { 
	.enable_bit	= 8,

};



static struct clk uart1_7xx = {

	.name		= "uart1_ck",

	.ops		= &clkops_generic,

	/* Direct from ULPD, no parent */

	.rate		= 12000000,

	.enable_reg	= OMAP1_IO_ADDRESS(SOFT_REQ_REG),

	.enable_bit	= 9,

};



static struct clk uart2_7xx = {

	.name		= "uart2_ck",

	.ops		= &clkops_generic,

	/* Direct from ULPD, no parent */

	.rate		= 12000000,

	.enable_reg	= OMAP1_IO_ADDRESS(SOFT_REQ_REG),

	.enable_bit	= 11,

};



static struct clk mclk_1510 = {

	.name		= "mclk",

	.ops		= &clkops_generic,
@@ -620,7 +638,9 @@ static struct omap_clk omap_clks[] = { 
	/* ULPD clocks */

	CLK(NULL,	"uart1_ck",	&uart1_1510,	CK_1510 | CK_310),

	CLK(NULL,	"uart1_ck",	&uart1_16xx.clk, CK_16XX),

	CLK(NULL,	"uart1_ck",	&uart1_7xx,	CK_7XX),

	CLK(NULL,	"uart2_ck",	&uart2_ck,	CK_16XX | CK_1510 | CK_310),

	CLK(NULL,	"uart2_ck",	&uart2_7xx,	CK_7XX),

	CLK(NULL,	"uart3_ck",	&uart3_1510,	CK_1510 | CK_310),

	CLK(NULL,	"uart3_ck",	&uart3_16xx.clk, CK_16XX),

	CLK(NULL,	"usb_clko",	&usb_clko,	CK_16XX | CK_1510 | CK_310),

arch/arm/mach-omap1/mux.c

+4 −0
Original line number Diff line number Diff line
@@ -70,6 +70,10 @@ MUX_CFG_7XX("SPI_7XX_3", 6, 13, 4, 12, 1, 0) 
MUX_CFG_7XX("SPI_7XX_4",           6,   17,    4,   16,   1, 0)

MUX_CFG_7XX("SPI_7XX_5",           8,   25,    0,   24,   0, 0)

MUX_CFG_7XX("SPI_7XX_6",           9,    5,    0,    4,   0, 0)



/* UART pins */

MUX_CFG_7XX("UART_7XX_1",          3,   21,    0,   20,   0, 0)

MUX_CFG_7XX("UART_7XX_2",          8,    1,    6,    0,   0, 0)

};

#define OMAP7XX_PINS_SZ		ARRAY_SIZE(omap7xx_pins)

#else

arch/arm/mach-omap1/serial.c

+7 −0
Original line number Diff line number Diff line
@@ -122,6 +122,13 @@ void __init omap_serial_init(void) 


	for (i = 0; i < ARRAY_SIZE(serial_platform_data) - 1; i++) {



		/* Don't look at UARTs higher than 2 for omap7xx */

		if (cpu_is_omap7xx() && i > 1) {

			serial_platform_data[i].membase = NULL;

			serial_platform_data[i].mapbase = 0;

			continue;

		}



		/* Static mapping, never released */

		serial_platform_data[i].membase =

			ioremap(serial_platform_data[i].mapbase, SZ_2K);

arch/arm/plat-omap/include/plat/mux.h

+4 −0
Original line number Diff line number Diff line
@@ -191,6 +191,10 @@ enum omap7xx_index { 
	SPI_7XX_4,

	SPI_7XX_5,

	SPI_7XX_6,



	/* UART */

	UART_7XX_1,

	UART_7XX_2,

};



enum omap1xxx_index {