Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 8b5689d7 authored by Daniele Ceraolo Spurio's avatar Daniele Ceraolo Spurio Committed by Chris Wilson
Browse files

drm/i915/uc: move GuC/HuC inside intel_gt under a new intel_uc 



Being part of the GT HW, it make sense to keep the guc/huc structures
inside the GT structure. To help with the encapsulation work done by the
following patches, both structures are placed inside a new intel_uc
container. Although this results in code with ugly nested dereferences
(i915->gt.uc.guc...), it saves us the extra work required in moving
the structures twice (i915 -> gt -> uc). The following patches will
reduce the number of places where we try to access the guc/huc
structures directly from i915 and reduce the ugliness.

Signed-off-by: default avatarDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190713100016.8026-7-chris@chris-wilson.co.uk


Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent 0f261b24

drivers/gpu/drm/i915/gt/intel_gt_types.h

+4 −0
Original line number Diff line number Diff line
@@ -13,6 +13,8 @@ 
#include <linux/spinlock.h>

#include <linux/types.h>



#include "uc/intel_uc.h"



#include "i915_vma.h"

#include "intel_reset_types.h"

#include "intel_wakeref.h"
@@ -34,6 +36,8 @@ struct intel_gt { 
	struct intel_uncore *uncore;

	struct i915_ggtt *ggtt;



	struct intel_uc uc;



	struct intel_gt_timelines {

		struct mutex mutex; /* protects list */

		struct list_head active_list;

drivers/gpu/drm/i915/gt/intel_reset.c

+3 −3
Original line number Diff line number Diff line
@@ -1099,14 +1099,14 @@ int intel_engine_reset(struct intel_engine_cs *engine, const char *msg) 
			   "Resetting %s for %s\n", engine->name, msg);

	atomic_inc(&engine->i915->gpu_error.reset_engine_count[engine->uabi_class]);



	if (!engine->i915->guc.execbuf_client)

	if (!engine->gt->uc.guc.execbuf_client)

		ret = intel_gt_reset_engine(engine);

	else

		ret = intel_guc_reset_engine(&engine->i915->guc, engine);

		ret = intel_guc_reset_engine(&engine->gt->uc.guc, engine);

	if (ret) {

		/* If we fail here, we expect to fallback to a global reset */

		DRM_DEBUG_DRIVER("%sFailed to reset %s, ret=%d\n",

				 engine->i915->guc.execbuf_client ? "GuC " : "",

				 engine->gt->uc.guc.execbuf_client ? "GuC " : "",

				 engine->name, ret);

		goto out;

	}

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

+1 −1
Original line number Diff line number Diff line
@@ -509,7 +509,7 @@ static void guc_submit(struct intel_engine_cs *engine, 
		       struct i915_request **out,

		       struct i915_request **end)

{

	struct intel_guc *guc = &engine->i915->guc;

	struct intel_guc *guc = &engine->gt->uc.guc;

	struct intel_guc_client *client = guc->execbuf_client;



	spin_lock(&client->wq_lock);

drivers/gpu/drm/i915/gt/uc/intel_huc.c

+2 −2
Original line number Diff line number Diff line
@@ -47,7 +47,7 @@ void intel_huc_init_early(struct intel_huc *huc) 
static int intel_huc_rsa_data_create(struct intel_huc *huc)

{

	struct drm_i915_private *i915 = huc_to_i915(huc);

	struct intel_guc *guc = &i915->guc;

	struct intel_guc *guc = &i915->gt.uc.guc;

	struct i915_vma *vma;

	void *vaddr;
@@ -113,7 +113,7 @@ void intel_huc_fini(struct intel_huc *huc) 
int intel_huc_auth(struct intel_huc *huc)

{

	struct drm_i915_private *i915 = huc_to_i915(huc);

	struct intel_guc *guc = &i915->guc;

	struct intel_guc *guc = &i915->gt.uc.guc;

	int ret;



	if (huc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)

drivers/gpu/drm/i915/gt/uc/intel_uc.c

+26 −26
Original line number Diff line number Diff line
@@ -54,8 +54,8 @@ static int __intel_uc_reset_hw(struct drm_i915_private *dev_priv) 


static int __get_platform_enable_guc(struct drm_i915_private *i915)

{

	struct intel_uc_fw *guc_fw = &i915->guc.fw;

	struct intel_uc_fw *huc_fw = &i915->huc.fw;

	struct intel_uc_fw *guc_fw = &i915->gt.uc.guc.fw;

	struct intel_uc_fw *huc_fw = &i915->gt.uc.huc.fw;

	int enable_guc = 0;



	if (!HAS_GUC(i915))
@@ -75,7 +75,7 @@ static int __get_default_guc_log_level(struct drm_i915_private *i915) 
{

	int guc_log_level;



	if (!intel_uc_fw_supported(&i915->guc.fw) ||

	if (!intel_uc_fw_supported(&i915->gt.uc.guc.fw) ||

	    !intel_uc_is_using_guc(i915))

		guc_log_level = GUC_LOG_LEVEL_DISABLED;

	else if (IS_ENABLED(CONFIG_DRM_I915_DEBUG) ||
@@ -108,8 +108,8 @@ static int __get_default_guc_log_level(struct drm_i915_private *i915) 
 */

static void sanitize_options_early(struct drm_i915_private *i915)

{

	struct intel_uc_fw *guc_fw = &i915->guc.fw;

	struct intel_uc_fw *huc_fw = &i915->huc.fw;

	struct intel_uc_fw *guc_fw = &i915->gt.uc.guc.fw;

	struct intel_uc_fw *huc_fw = &i915->gt.uc.huc.fw;



	/* A negative value means "use platform default" */

	if (i915_modparams.enable_guc < 0)
@@ -178,8 +178,8 @@ static void sanitize_options_early(struct drm_i915_private *i915) 


void intel_uc_init_early(struct drm_i915_private *i915)

{

	struct intel_guc *guc = &i915->guc;

	struct intel_huc *huc = &i915->huc;

	struct intel_guc *guc = &i915->gt.uc.guc;

	struct intel_huc *huc = &i915->gt.uc.huc;



	intel_guc_init_early(guc);

	intel_huc_init_early(huc);
@@ -189,7 +189,7 @@ void intel_uc_init_early(struct drm_i915_private *i915) 


void intel_uc_cleanup_early(struct drm_i915_private *i915)

{

	struct intel_guc *guc = &i915->guc;

	struct intel_guc *guc = &i915->gt.uc.guc;



	guc_free_load_err_log(guc);

}
@@ -203,7 +203,7 @@ void intel_uc_cleanup_early(struct drm_i915_private *i915) 
 */

void intel_uc_init_mmio(struct drm_i915_private *i915)

{

	intel_guc_init_send_regs(&i915->guc);

	intel_guc_init_send_regs(&i915->gt.uc.guc);

}



static void guc_capture_load_err_log(struct intel_guc *guc)
@@ -355,10 +355,10 @@ void intel_uc_fetch_firmwares(struct drm_i915_private *i915) 
	if (!USES_GUC(i915))

		return;



	intel_uc_fw_fetch(i915, &i915->guc.fw);

	intel_uc_fw_fetch(i915, &i915->gt.uc.guc.fw);



	if (USES_HUC(i915))

		intel_uc_fw_fetch(i915, &i915->huc.fw);

		intel_uc_fw_fetch(i915, &i915->gt.uc.huc.fw);

}



void intel_uc_cleanup_firmwares(struct drm_i915_private *i915)
@@ -367,15 +367,15 @@ void intel_uc_cleanup_firmwares(struct drm_i915_private *i915) 
		return;



	if (USES_HUC(i915))

		intel_uc_fw_cleanup_fetch(&i915->huc.fw);

		intel_uc_fw_cleanup_fetch(&i915->gt.uc.huc.fw);



	intel_uc_fw_cleanup_fetch(&i915->guc.fw);

	intel_uc_fw_cleanup_fetch(&i915->gt.uc.guc.fw);

}



int intel_uc_init(struct drm_i915_private *i915)

{

	struct intel_guc *guc = &i915->guc;

	struct intel_huc *huc = &i915->huc;

	struct intel_guc *guc = &i915->gt.uc.guc;

	struct intel_huc *huc = &i915->gt.uc.huc;

	int ret;



	if (!USES_GUC(i915))
@@ -419,7 +419,7 @@ int intel_uc_init(struct drm_i915_private *i915) 


void intel_uc_fini(struct drm_i915_private *i915)

{

	struct intel_guc *guc = &i915->guc;

	struct intel_guc *guc = &i915->gt.uc.guc;



	if (!USES_GUC(i915))

		return;
@@ -430,15 +430,15 @@ void intel_uc_fini(struct drm_i915_private *i915) 
		intel_guc_submission_fini(guc);



	if (USES_HUC(i915))

		intel_huc_fini(&i915->huc);

		intel_huc_fini(&i915->gt.uc.huc);



	intel_guc_fini(guc);

}



static void __uc_sanitize(struct drm_i915_private *i915)

{

	struct intel_guc *guc = &i915->guc;

	struct intel_huc *huc = &i915->huc;

	struct intel_guc *guc = &i915->gt.uc.guc;

	struct intel_huc *huc = &i915->gt.uc.huc;



	GEM_BUG_ON(!intel_uc_fw_supported(&guc->fw));
@@ -458,8 +458,8 @@ void intel_uc_sanitize(struct drm_i915_private *i915) 


int intel_uc_init_hw(struct drm_i915_private *i915)

{

	struct intel_guc *guc = &i915->guc;

	struct intel_huc *huc = &i915->huc;

	struct intel_guc *guc = &i915->gt.uc.guc;

	struct intel_huc *huc = &i915->gt.uc.huc;

	int ret, attempts;



	if (!USES_GUC(i915))
@@ -557,7 +557,7 @@ int intel_uc_init_hw(struct drm_i915_private *i915) 


void intel_uc_fini_hw(struct drm_i915_private *i915)

{

	struct intel_guc *guc = &i915->guc;

	struct intel_guc *guc = &i915->gt.uc.guc;



	if (!intel_guc_is_loaded(guc))

		return;
@@ -579,7 +579,7 @@ void intel_uc_fini_hw(struct drm_i915_private *i915) 
 */

void intel_uc_reset_prepare(struct drm_i915_private *i915)

{

	struct intel_guc *guc = &i915->guc;

	struct intel_guc *guc = &i915->gt.uc.guc;



	if (!intel_guc_is_loaded(guc))

		return;
@@ -590,7 +590,7 @@ void intel_uc_reset_prepare(struct drm_i915_private *i915) 


void intel_uc_runtime_suspend(struct drm_i915_private *i915)

{

	struct intel_guc *guc = &i915->guc;

	struct intel_guc *guc = &i915->gt.uc.guc;

	int err;



	if (!intel_guc_is_loaded(guc))
@@ -605,7 +605,7 @@ void intel_uc_runtime_suspend(struct drm_i915_private *i915) 


void intel_uc_suspend(struct drm_i915_private *i915)

{

	struct intel_guc *guc = &i915->guc;

	struct intel_guc *guc = &i915->gt.uc.guc;

	intel_wakeref_t wakeref;



	if (!intel_guc_is_loaded(guc))
@@ -617,7 +617,7 @@ void intel_uc_suspend(struct drm_i915_private *i915) 


int intel_uc_resume(struct drm_i915_private *i915)

{

	struct intel_guc *guc = &i915->guc;

	struct intel_guc *guc = &i915->gt.uc.guc;

	int err;



	if (!intel_guc_is_loaded(guc))