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Commit 8af81ddb authored by Abylay Ospan's avatar Abylay Ospan Committed by Mauro Carvalho Chehab
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[media] Fix CI code for NetUP Dual DVB-T/C CI RF card



CI reset takes several seconds on some CAM,
so there is no need to lock mutex all that time.
Also we need not to preserve CI's reset bits in
CIBUSCTRL register, they are handled automatically by FPGA.
Set it to 0 explicitly in order to not reset wrong CAM.

Signed-off-by: default avatarAbylay Ospan <aospan@netup.ru>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@redhat.com>
parent 78db66e5
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+10 −4
Original line number Diff line number Diff line
@@ -283,7 +283,7 @@ int altera_ci_op_cam(struct dvb_ca_en50221 *en50221, int slot,
	netup_fpga_op_rw(inter, NETUP_CI_ADDR1, ((addr >> 7) & 0x7f), 0);
	store = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, 0, NETUP_CI_FLG_RD);

	store &= 0x3f;
	store &= 0x0f;
	store |= ((state->nr << 7) | (flag << 6));

	netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, store, 0);
@@ -340,19 +340,25 @@ int altera_ci_slot_reset(struct dvb_ca_en50221 *en50221, int slot)

	ret = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, 0, NETUP_CI_FLG_RD);
	netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL,
				ret | (1 << (5 - state->nr)), 0);
				(ret & 0xcf) | (1 << (5 - state->nr)), 0);

	mutex_unlock(&inter->fpga_mutex);

	for (;;) {
		mdelay(50);

		mutex_lock(&inter->fpga_mutex);

		ret = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL,
						0, NETUP_CI_FLG_RD);
		mutex_unlock(&inter->fpga_mutex);

		if ((ret & (1 << (5 - state->nr))) == 0)
			break;
		if (time_after(jiffies, t_out))
			break;
	}

	mutex_unlock(&inter->fpga_mutex);

	ci_dbg_print("%s: %d msecs\n", __func__,
		jiffies_to_msecs(jiffies + msecs_to_jiffies(9999) - t_out));
@@ -381,7 +387,7 @@ int altera_ci_slot_ts_ctl(struct dvb_ca_en50221 *en50221, int slot)

	ret = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, 0, NETUP_CI_FLG_RD);
	netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL,
				ret | (1 << (3 - state->nr)), 0);
				(ret & 0x0f) | (1 << (3 - state->nr)), 0);

	mutex_unlock(&inter->fpga_mutex);