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Commit 8aeb7f62 authored by Mika Kuoppala's avatar Mika Kuoppala Committed by Mika Kuoppala
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drm/i915/kbl: Add WaDisableGamClockGating 



According to bspec we need to disable gam unit clock gating on
on kbl revids A0 and B0.

References: HSD#2226858, HSD#1944358
Signed-off-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: default avatarMatthew Auld <matthew.auld@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1465309159-30531-14-git-send-email-mika.kuoppala@intel.com
parent b033bb6d

drivers/gpu/drm/i915/i915_reg.h

+1 −0
Original line number Diff line number Diff line
@@ -6938,6 +6938,7 @@ enum skl_disp_power_wells { 
#define    EDRAM_SETS_IDX(cap)			(((cap) >> 8) & 0x3)



#define GEN6_UCGCTL1				_MMIO(0x9400)

# define GEN6_GAMUNIT_CLOCK_GATE_DISABLE		(1 << 22)

# define GEN6_EU_TCUNIT_CLOCK_GATE_DISABLE		(1 << 16)

# define GEN6_BLBUNIT_CLOCK_GATE_DISABLE		(1 << 5)

# define GEN6_CSUNIT_CLOCK_GATE_DISABLE			(1 << 7)

drivers/gpu/drm/i915/intel_pm.c

+5 −0
Original line number Diff line number Diff line
@@ -6983,6 +6983,11 @@ static void kabylake_init_clock_gating(struct drm_device *dev) 
	if (IS_KBL_REVID(dev_priv, 0, KBL_REVID_B0))

		I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |

			   GEN8_SDEUNIT_CLOCK_GATE_DISABLE);



	/* WaDisableGamClockGating:kbl */

	if (IS_KBL_REVID(dev_priv, 0, KBL_REVID_B0))

		I915_WRITE(GEN6_UCGCTL1, I915_READ(GEN6_UCGCTL1) |

			   GEN6_GAMUNIT_CLOCK_GATE_DISABLE);

}



static void skylake_init_clock_gating(struct drm_device *dev)