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Commit 8ae1a336 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu: add gpu_info firmware (v3) 



Add a new gpu info firmware to store gpu specific configuration
data.  This allows us to store hw constants in a unified place.

v2: adjust structure and elements
v3: further restructure

Reviewed-by: default avatarJunwei Zhang <Jerry.Zhang@amd.com>
Tested-by: default avatarJunwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 2f590f84

drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c

+21 −0
Original line number Diff line number Diff line
@@ -197,6 +197,27 @@ void amdgpu_ucode_print_sdma_hdr(const struct common_firmware_header *hdr) 
	}

}



void amdgpu_ucode_print_gpu_info_hdr(const struct common_firmware_header *hdr)

{

	uint16_t version_major = le16_to_cpu(hdr->header_version_major);

	uint16_t version_minor = le16_to_cpu(hdr->header_version_minor);



	DRM_DEBUG("GPU_INFO\n");

	amdgpu_ucode_print_common_hdr(hdr);



	if (version_major == 1) {

		const struct gpu_info_firmware_header_v1_0 *gpu_info_hdr =

			container_of(hdr, struct gpu_info_firmware_header_v1_0, header);



		DRM_DEBUG("version_major: %u\n",

			  le16_to_cpu(gpu_info_hdr->version_major));

		DRM_DEBUG("version_minor: %u\n",

			  le16_to_cpu(gpu_info_hdr->version_minor));

	} else {

		DRM_ERROR("Unknown gpu_info ucode version: %u.%u\n", version_major, version_minor);

	}

}



int amdgpu_ucode_validate(const struct firmware *fw)

{

	const struct common_firmware_header *hdr =

drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h

+25 −0
Original line number Diff line number Diff line
@@ -113,6 +113,29 @@ struct sdma_firmware_header_v1_1 { 
	uint32_t digest_size;

};



/* gpu info payload */

struct gpu_info_firmware_v1_0 {

	uint32_t gc_num_se;

	uint32_t gc_num_cu_per_sh;

	uint32_t gc_num_sh_per_se;

	uint32_t gc_num_rb_per_se;

	uint32_t gc_num_tccs;

	uint32_t gc_num_gprs;

	uint32_t gc_num_max_gs_thds;

	uint32_t gc_gs_table_depth;

	uint32_t gc_gsprim_buff_depth;

	uint32_t gc_parameter_cache_depth;

	uint32_t gc_double_offchip_lds_buffer;

	uint32_t gc_wave_size;

};



/* version_major=1, version_minor=0 */

struct gpu_info_firmware_header_v1_0 {

	struct common_firmware_header header;

	uint16_t version_major; /* version */

	uint16_t version_minor; /* version */

};



/* header is fixed size */

union amdgpu_firmware_header {

	struct common_firmware_header common;
@@ -124,6 +147,7 @@ union amdgpu_firmware_header { 
	struct rlc_firmware_header_v2_0 rlc_v2_0;

	struct sdma_firmware_header_v1_0 sdma;

	struct sdma_firmware_header_v1_1 sdma_v1_1;

	struct gpu_info_firmware_header_v1_0 gpu_info;

	uint8_t raw[0x100];

};
@@ -184,6 +208,7 @@ void amdgpu_ucode_print_smc_hdr(const struct common_firmware_header *hdr); 
void amdgpu_ucode_print_gfx_hdr(const struct common_firmware_header *hdr);

void amdgpu_ucode_print_rlc_hdr(const struct common_firmware_header *hdr);

void amdgpu_ucode_print_sdma_hdr(const struct common_firmware_header *hdr);

void amdgpu_ucode_print_gpu_info_hdr(const struct common_firmware_header *hdr);

int amdgpu_ucode_validate(const struct firmware *fw);

bool amdgpu_ucode_hdr_version(union amdgpu_firmware_header *hdr,

				uint16_t hdr_major, uint16_t hdr_minor);