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Commit 8ad83e3c authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'amlogic-dt' of...

Merge tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt

ARM: dts: Amlogic updates for v5.4

Highlights
- odroid-c1: use MAC address from efuse
- add VDD_EE regulator to several boards

* tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  ARM: dts: meson8b: odroidc1: use the MAC address stored in the eFuse
  ARM: dts: meson8b: mxq: add the VDDEE regulator
  ARM: dts: meson8b: odroidc1: add the VDDEE regulator
  ARM: dts: meson8b: ec100: add the VDDEE regulator
  ARM: dts: meson8b: add the PWM_D output pin
  ARM: dts: meson8b: add ethernet fifo sizes

Link: https://lore.kernel.org/r/7hzhk3bi96.fsf@baylibre.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents aa85a286 6b14dd72
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+28 −3
Original line number Diff line number Diff line
@@ -219,6 +219,27 @@
		 */
		vin-supply = <&vcc_3v3>;
	};

	vddee: regulator-vddee {
		/*
		 * Silergy SY8089AAC-GP 2A continuous, 3A peak, 1MHz
		 * Synchronous Step Down Regulator. Also called VDDAO
		 * in a part of the schematics.
		 */
		compatible = "pwm-regulator";

		regulator-name = "VDDEE";
		regulator-min-microvolt = <860000>;
		regulator-max-microvolt = <1140000>;

		vin-supply = <&vcc_5v>;

		pwms = <&pwm_cd 1 1148 0>;
		pwm-dutycycle-range = <100 0>;

		regulator-boot-on;
		regulator-always-on;
	};
};

&cpu0 {
@@ -269,6 +290,10 @@
	};
};

&mali {
	mali-supply = <&vddee>;
};

&saradc {
	status = "okay";
	vref-supply = <&vcc_1v8>;
@@ -350,10 +375,10 @@

&pwm_cd {
	status = "okay";
	pinctrl-0 = <&pwm_c1_pins>;
	pinctrl-0 = <&pwm_c1_pins>, <&pwm_d_pins>;
	pinctrl-names = "default";
	clocks = <&clkc CLKID_XTAL>;
	clock-names = "clkin0";
	clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_XTAL>;
	clock-names = "clkin0", "clkin1";
};

&rtc {
+23 −3
Original line number Diff line number Diff line
@@ -76,6 +76,22 @@
		regulator-boot-on;
		regulator-always-on;
	};

	vddee: regulator-vddee {
		compatible = "pwm-regulator";

		regulator-name = "VDDEE";
		regulator-min-microvolt = <860000>;
		regulator-max-microvolt = <1140000>;

		vin-supply = <&vcc_5v>;

		pwms = <&pwm_cd 1 1148 0>;
		pwm-dutycycle-range = <100 0>;

		regulator-boot-on;
		regulator-always-on;
	};
};

&cpu0 {
@@ -112,6 +128,10 @@
	};
};

&mali {
	mali-supply = <&vddee>;
};

&saradc {
	status = "okay";
	vref-supply = <&vcc_1v8>;
@@ -143,10 +163,10 @@

&pwm_cd {
	status = "okay";
	pinctrl-0 = <&pwm_c1_pins>;
	pinctrl-0 = <&pwm_c1_pins>, <&pwm_d_pins>;
	pinctrl-names = "default";
	clocks = <&clkc CLKID_XTAL>;
	clock-names = "clkin0";
	clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_XTAL>;
	clock-names = "clkin0", "clkin1";
};

&uart_AO {
+33 −3
Original line number Diff line number Diff line
@@ -154,6 +154,23 @@
		vin-supply = <&p5v0>;
	};

	vddee: regulator-vddee {
		/* Monolithic Power Systems MP2161 */
		compatible = "pwm-regulator";

		regulator-name = "VDDEE";
		regulator-min-microvolt = <860000>;
		regulator-max-microvolt = <1140000>;

		vin-supply = <&p5v0>;

		pwms = <&pwm_cd 1 12218 0>;
		pwm-dutycycle-range = <91 0>;

		regulator-boot-on;
		regulator-always-on;
	};

	vdd_rtc: regulator-vdd-rtc {
		/*
		 * Torex Semiconductor XC6215 configured for a fixed output of
@@ -173,6 +190,12 @@
	cpu-supply = <&vcck>;
};

&efuse {
	ethernet_mac_address: mac@1b4 {
		reg = <0x1b4 0x6>;
	};
};

&ethmac {
	status = "okay";

@@ -183,6 +206,9 @@
	phy-handle = <&eth_phy>;
	amlogic,tx-delay-ns = <4>;

	nvmem-cells = <&ethernet_mac_address>;
	nvmem-cell-names = "mac-address";

	mdio {
		compatible = "snps,dwmac-mdio";
		#address-cells = <1>;
@@ -276,6 +302,10 @@
	pinctrl-names = "default";
};

&mali {
	mali-supply = <&vddee>;
};

&saradc {
	status = "okay";
	vref-supply = <&vcc_1v8>;
@@ -308,10 +338,10 @@

&pwm_cd {
	status = "okay";
	pinctrl-0 = <&pwm_c1_pins>;
	pinctrl-0 = <&pwm_c1_pins>, <&pwm_d_pins>;
	pinctrl-names = "default";
	clocks = <&clkc CLKID_XTAL>;
	clock-names = "clkin0";
	clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_XTAL>;
	clock-names = "clkin0", "clkin1";
};

&rtc {
+10 −0
Original line number Diff line number Diff line
@@ -361,6 +361,14 @@
			};
		};

		pwm_d_pins: pwm-d {
			mux {
				groups = "pwm_d";
				function = "pwm_d";
				bias-disable;
			};
		};

		uart_b0_pins: uart-b0 {
			mux {
				groups = "uart_tx_b0",
@@ -410,6 +418,8 @@
		 <&clkc CLKID_MPLL2>,
		 <&clkc CLKID_MPLL2>;
	clock-names = "stmmaceth", "clkin0", "clkin1";
	rx-fifo-depth = <4096>;
	tx-fifo-depth = <2048>;

	resets = <&reset RESET_ETHERNET>;
	reset-names = "stmmaceth";