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Commit 8a9285a5 authored by George Shen's avatar George Shen
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ARM: dts: msm: Add CVP AXI reset pulse 

CVP hardware programming guide requires inserting a AXI clock reset
pulse in CVP power on sequence.

Change-Id: I10dd30b229a6a772a247144986da52c917268e38
parent bde73178

qcom/lahaina-cvp.dtsi

+4 −2
Original line number Diff line number Diff line
@@ -28,8 +28,10 @@ 
		qcom,clock-configs = <0x0 0x1 0x1>;

		qcom,allowed-clock-rates = <280000000 366000000 444000000>;



		resets = <&clock_videocc VIDEO_CC_MVS1C_CLK_ARES>;

		reset-names = "cvp_core_reset";

		resets = <&clock_gcc GCC_VIDEO_AXI1_CLK_ARES>,

			<&clock_videocc VIDEO_CC_MVS1C_CLK_ARES>;

		reset-names = "cvp_axi_reset", "cvp_core_reset";

		reset-power-status = <0x2 0x1>;



		qcom,reg-presets = <0xB0088 0x0>;