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Commit 8a837cdb authored by David Daney's avatar David Daney Committed by Ralf Baechle
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MIPS: OCTEON: Move CAVIUM_OCTEON_CVMSEG_SIZE to CPU_CAVIUM_OCTEON 



CVMSEG is related to the CPU core not the SoC system.  So needs to be
configurable there.

Signed-off-by: default avatarDavid Daney <david.daney@cavium.com>
Signed-off-by: default avatarAndreas Herrmann <andreas.herrmann@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: James Hogan <james.hogan@imgtec.com>
Cc: kvm@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7013/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 6e511163

arch/mips/cavium-octeon/Kconfig

+11 −12
Original line number Diff line number Diff line
@@ -10,6 +10,17 @@ config CAVIUM_CN63XXP1 
	  non-CN63XXP1 hardware, so it is recommended to select "n"

	  unless it is known the workarounds are needed.



config CAVIUM_OCTEON_CVMSEG_SIZE

	int "Number of L1 cache lines reserved for CVMSEG memory"

	range 0 54

	default 1

	help

	  CVMSEG LM is a segment that accesses portions of the dcache as a

	  local memory; the larger CVMSEG is, the smaller the cache is.

	  This selects the size of CVMSEG LM, which is in cache blocks. The

	  legally range is from zero to 54 cache blocks (i.e. CVMSEG LM is

	  between zero and 6192 bytes).



endif # CPU_CAVIUM_OCTEON



if CAVIUM_OCTEON_SOC
@@ -23,17 +34,6 @@ config CAVIUM_OCTEON_2ND_KERNEL 
	  with this option to be run at the same time as one built without this

	  option.



config CAVIUM_OCTEON_CVMSEG_SIZE

	int "Number of L1 cache lines reserved for CVMSEG memory"

	range 0 54

	default 1

	help

	  CVMSEG LM is a segment that accesses portions of the dcache as a

	  local memory; the larger CVMSEG is, the smaller the cache is.

	  This selects the size of CVMSEG LM, which is in cache blocks. The

	  legally range is from zero to 54 cache blocks (i.e. CVMSEG LM is

	  between zero and 6192 bytes).



config CAVIUM_OCTEON_LOCK_L2

	bool "Lock often used kernel code in the L2"

	default "y"
@@ -86,7 +86,6 @@ config SWIOTLB 
	select IOMMU_HELPER

	select NEED_SG_DMA_LENGTH





config OCTEON_ILM

	tristate "Module to measure interrupt latency using Octeon CIU Timer"

	help