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Commit 8a66c20e authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'samsung-dt64-4.21-2' of... 

Merge tag 'samsung-dt64-4.21-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/late

Samsung DTS ARM64 changes for v4.21, part 2

Add IMEM clock controller (for Security SubSystem) and Bluetooth chip to
Exynos5433 TM2(e) boards.

* tag 'samsung-dt64-4.21-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux

:
  arm64: dts: exynos: Add Bluetooth chip to TM2(e) boards
  arm64: dts: exynos: Add IMEM clock controller to Exynos5433
  arm64: dts: exynos: Add all CPUs in cooling maps
  arm64: dts: exynos: Update DWC3 modules on Exynos5433 SoCs

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents c6f9fa88 74ebbdda

arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi

+14 −0
Original line number Original line Diff line number Diff line
@@ -1202,6 +1202,20 @@ 
	status = "okay";

	status = "okay";

};

};





&serial_3 {

	status = "okay";



	bluetooth {

		compatible = "brcm,bcm43438-bt";

		max-speed = <3000000>;

		shutdown-gpios = <&gpd4 0 GPIO_ACTIVE_HIGH>;

		device-wakeup-gpios = <&gpr3 7 GPIO_ACTIVE_HIGH>;

		host-wakeup-gpios = <&gpa2 2 GPIO_ACTIVE_HIGH>;

		clocks = <&s2mps13_osc S2MPS11_CLK_BT>;

		clock-names = "extclk";

	};

};



&spi_1 {

&spi_1 {

	cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;

	cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;

	status = "okay";

	status = "okay";

arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi

+24 −12
Original line number Original line Diff line number Diff line
@@ -55,37 +55,44 @@ thermal-zones { 
			map0 {

			map0 {

				/* Set maximum frequency as 1800MHz  */

				/* Set maximum frequency as 1800MHz  */

				trip = <&atlas0_alert_0>;

				trip = <&atlas0_alert_0>;

				cooling-device = <&cpu4 1 2>;

				cooling-device = <&cpu4 1 2>, <&cpu5 1 2>,

						 <&cpu6 1 2>, <&cpu7 1 2>;

			};

			};

			map1 {

			map1 {

				/* Set maximum frequency as 1700MHz  */

				/* Set maximum frequency as 1700MHz  */

				trip = <&atlas0_alert_1>;

				trip = <&atlas0_alert_1>;

				cooling-device = <&cpu4 2 3>;

				cooling-device = <&cpu4 2 3>, <&cpu5 2 3>,

						 <&cpu6 2 3>, <&cpu7 2 3>;

			};

			};

			map2 {

			map2 {

				/* Set maximum frequency as 1600MHz  */

				/* Set maximum frequency as 1600MHz  */

				trip = <&atlas0_alert_2>;

				trip = <&atlas0_alert_2>;

				cooling-device = <&cpu4 3 4>;

				cooling-device = <&cpu4 3 4>, <&cpu5 3 4>,

						 <&cpu6 3 4>, <&cpu7 3 4>;

			};

			};

			map3 {

			map3 {

				/* Set maximum frequency as 1500MHz  */

				/* Set maximum frequency as 1500MHz  */

				trip = <&atlas0_alert_3>;

				trip = <&atlas0_alert_3>;

				cooling-device = <&cpu4 4 5>;

				cooling-device = <&cpu4 4 5>, <&cpu5 4 5>,

						 <&cpu6 4 5>, <&cpu7 4 5>;

			};

			};

			map4 {

			map4 {

				/* Set maximum frequency as 1400MHz  */

				/* Set maximum frequency as 1400MHz  */

				trip = <&atlas0_alert_4>;

				trip = <&atlas0_alert_4>;

				cooling-device = <&cpu4 5 7>;

				cooling-device = <&cpu4 5 7>, <&cpu5 5 7>,

						 <&cpu6 5 7>, <&cpu7 5 7>;

			};

			};

			map5 {

			map5 {

				/* Set maximum frequencyas 1200MHz  */

				/* Set maximum frequencyas 1200MHz  */

				trip = <&atlas0_alert_5>;

				trip = <&atlas0_alert_5>;

				cooling-device = <&cpu4 7 9>;

				cooling-device = <&cpu4 7 9>, <&cpu5 7 9>,

						 <&cpu6 7 9>, <&cpu7 7 9>;

			};

			};

			map6 {

			map6 {

				/* Set maximum frequency as 1000MHz  */

				/* Set maximum frequency as 1000MHz  */

				trip = <&atlas0_alert_6>;

				trip = <&atlas0_alert_6>;

				cooling-device = <&cpu4 9 14>;

				cooling-device = <&cpu4 9 14>, <&cpu5 9 14>,

						 <&cpu6 9 14>, <&cpu7 9 14>;

			};

			};

		};

		};

	};

	};
@@ -222,27 +229,32 @@ thermal-zones { 
			map0 {

			map0 {

				/* Set maximum frequency as 1200MHz  */

				/* Set maximum frequency as 1200MHz  */

				trip = <&apollo_alert_2>;

				trip = <&apollo_alert_2>;

				cooling-device = <&cpu0 1 2>;

				cooling-device = <&cpu0 1 2>, <&cpu1 1 2>,

						 <&cpu2 1 2>, <&cpu3 1 2>;

			};

			};

			map1 {

			map1 {

				/* Set maximum frequency as 1100MHz  */

				/* Set maximum frequency as 1100MHz  */

				trip = <&apollo_alert_3>;

				trip = <&apollo_alert_3>;

				cooling-device = <&cpu0 2 3>;

				cooling-device = <&cpu0 2 3>, <&cpu1 2 3>,

						 <&cpu2 2 3>, <&cpu3 2 3>;

			};

			};

			map2 {

			map2 {

				/* Set maximum frequency as 1000MHz  */

				/* Set maximum frequency as 1000MHz  */

				trip = <&apollo_alert_4>;

				trip = <&apollo_alert_4>;

				cooling-device = <&cpu0 3 4>;

				cooling-device = <&cpu0 3 4>, <&cpu1 3 4>,

						 <&cpu2 3 4>, <&cpu3 3 4>;

			};

			};

			map3 {

			map3 {

				/* Set maximum frequency as 900MHz  */

				/* Set maximum frequency as 900MHz  */

				trip = <&apollo_alert_5>;

				trip = <&apollo_alert_5>;

				cooling-device = <&cpu0 4 5>;

				cooling-device = <&cpu0 4 5>, <&cpu1 4 5>,

						 <&cpu2 4 5>, <&cpu3 4 5>;

			};

			};

			map4 {

			map4 {

				/* Set maximum frequency as 800MHz  */

				/* Set maximum frequency as 800MHz  */

				trip = <&apollo_alert_6>;

				trip = <&apollo_alert_6>;

				cooling-device = <&cpu0 5 9>;

				cooling-device = <&cpu0 5 9>, <&cpu1 5 9>,

						 <&cpu2 5 9>, <&cpu3 5 9>;

			};

			};

		};

		};

	};

	};

arch/arm64/boot/dts/exynos/exynos5433.dtsi

+33 −6
Original line number Original line Diff line number Diff line
@@ -544,6 +544,21 @@ 
			power-domains = <&pd_cam1>;

			power-domains = <&pd_cam1>;

		};

		};





		cmu_imem: clock-controller@11060000 {

			compatible = "samsung,exynos5433-cmu-imem";

			reg = <0x11060000 0x1000>;

			#clock-cells = <1>;



			clock-names = "oscclk",

				"aclk_imem_sssx_266",

				"aclk_imem_266",

				"aclk_imem_200";

			clocks = <&xxti>,

				<&cmu_top CLK_DIV_ACLK_IMEM_SSSX_266>,

				<&cmu_top CLK_DIV_ACLK_IMEM_266>,

				<&cmu_top CLK_DIV_ACLK_IMEM_200>;

		};



		pd_gscl: power-domain@105c4000 {

		pd_gscl: power-domain@105c4000 {

			compatible = "samsung,exynos5433-pd";

			compatible = "samsung,exynos5433-pd";

			reg = <0x105c4000 0x20>;

			reg = <0x105c4000 0x20>;
@@ -1559,10 +1574,12 @@ 
		};

		};





		usbdrd30: usbdrd {

		usbdrd30: usbdrd {

			compatible = "samsung,exynos5250-dwusb3";

			compatible = "samsung,exynos5433-dwusb3";

			clocks = <&cmu_fsys CLK_ACLK_USBDRD30>,

			clocks = <&cmu_fsys CLK_ACLK_USBDRD30>,

				<&cmu_fsys CLK_SCLK_USBDRD30>;

				<&cmu_fsys CLK_SCLK_USBDRD30>,

			clock-names = "usbdrd30", "usbdrd30_susp_clk";

				<&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK>,

				<&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK>;

			clock-names = "aclk", "susp_clk", "phyclk", "pipe_pclk";

			#address-cells = <1>;

			#address-cells = <1>;

			#size-cells = <1>;

			#size-cells = <1>;

			ranges;

			ranges;
@@ -1570,6 +1587,10 @@ 




			usbdrd_dwc3: dwc3@15400000 {

			usbdrd_dwc3: dwc3@15400000 {

				compatible = "snps,dwc3";

				compatible = "snps,dwc3";

				clocks = <&cmu_fsys CLK_SCLK_USBDRD30>,

					<&cmu_fsys CLK_ACLK_USBDRD30>,

					<&cmu_fsys CLK_SCLK_USBDRD30>;

				clock-names = "ref", "bus_early", "suspend";

				reg = <0x15400000 0x10000>;

				reg = <0x15400000 0x10000>;

				interrupts = <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>;

				interrupts = <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>;

				phys = <&usbdrd30_phy 0>, <&usbdrd30_phy 1>;

				phys = <&usbdrd30_phy 0>, <&usbdrd30_phy 1>;
@@ -1606,10 +1627,12 @@ 
		};

		};





		usbhost30: usbhost {

		usbhost30: usbhost {

			compatible = "samsung,exynos5250-dwusb3";

			compatible = "samsung,exynos5433-dwusb3";

			clocks = <&cmu_fsys CLK_ACLK_USBHOST30>,

			clocks = <&cmu_fsys CLK_ACLK_USBHOST30>,

				<&cmu_fsys CLK_SCLK_USBHOST30>;

				<&cmu_fsys CLK_SCLK_USBHOST30>,

			clock-names = "usbdrd30", "usbdrd30_susp_clk";

				<&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK>,

				<&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK>;

			clock-names = "aclk", "susp_clk", "phyclk", "pipe_pclk";

			#address-cells = <1>;

			#address-cells = <1>;

			#size-cells = <1>;

			#size-cells = <1>;

			ranges;

			ranges;
@@ -1617,6 +1640,10 @@ 




			usbhost_dwc3: dwc3@15a00000 {

			usbhost_dwc3: dwc3@15a00000 {

				compatible = "snps,dwc3";

				compatible = "snps,dwc3";

				clocks = <&cmu_fsys CLK_SCLK_USBHOST30>,

					<&cmu_fsys CLK_ACLK_USBHOST30>,

					<&cmu_fsys CLK_SCLK_USBHOST30>;

				clock-names = "ref", "bus_early", "suspend";

				reg = <0x15a00000 0x10000>;

				reg = <0x15a00000 0x10000>;

				interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;

				interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;

				phys = <&usbhost30_phy 0>, <&usbhost30_phy 1>;

				phys = <&usbhost30_phy 0>, <&usbhost30_phy 1>;