Merge "clk: qcom: update the DisplayPort clocks" (8a492f7f) · Commits · e / devices / android_kernel_fairphone_FP5

drivers/clk/qcom/dispcc-lahaina.c

+12 −12

Original line number	Diff line number	Diff line
		@@ -410,9 +410,9 @@ static struct clk_rcg2 disp_cc_mdss_dp_link1_clk_src = {
		.vdd_class = &vdd_mm,
		.num_rate_max = VDD_NUM,
		.rate_max = (unsigned long[VDD_NUM]) {
		[VDD_LOWER] = 270000000,
		[VDD_LOW_L1] = 540000000,
		[VDD_NOMINAL] = 810000000},
		[VDD_LOWER] = 270000,
		[VDD_LOW_L1] = 540000,
		[VDD_NOMINAL] = 810000},
		},
		};

		@@ -433,9 +433,9 @@ static struct clk_rcg2 disp_cc_mdss_dp_link_clk_src = {
		.vdd_class = &vdd_mm,
		.num_rate_max = VDD_NUM,
		.rate_max = (unsigned long[VDD_NUM]) {
		[VDD_LOWER] = 270000000,
		[VDD_LOW_L1] = 540000000,
		[VDD_NOMINAL] = 810000000},
		[VDD_LOWER] = 270000,
		[VDD_LOW_L1] = 540000,
		[VDD_NOMINAL] = 810000},
		},
		};

		@@ -456,8 +456,8 @@ static struct clk_rcg2 disp_cc_mdss_dp_pixel1_clk_src = {
		.vdd_class = &vdd_mm,
		.num_rate_max = VDD_NUM,
		.rate_max = (unsigned long[VDD_NUM]) {
		[VDD_LOWER] = 337500000,
		[VDD_NOMINAL] = 675000000},
		[VDD_LOWER] = 337500,
		[VDD_NOMINAL] = 675000},
		},
		};

		@@ -478,8 +478,8 @@ static struct clk_rcg2 disp_cc_mdss_dp_pixel2_clk_src = {
		.vdd_class = &vdd_mm,
		.num_rate_max = VDD_NUM,
		.rate_max = (unsigned long[VDD_NUM]) {
		[VDD_LOWER] = 337500000,
		[VDD_NOMINAL] = 675000000},
		[VDD_LOWER] = 337500,
		[VDD_NOMINAL] = 675000},
		},
		};

		@@ -500,8 +500,8 @@ static struct clk_rcg2 disp_cc_mdss_dp_pixel_clk_src = {
		.vdd_class = &vdd_mm,
		.num_rate_max = VDD_NUM,
		.rate_max = (unsigned long[VDD_NUM]) {
		[VDD_LOWER] = 337500000,
		[VDD_NOMINAL] = 675000000},
		[VDD_LOWER] = 337500,
		[VDD_NOMINAL] = 675000},
		},
		};