Loading arch/arm/Kconfig +2 −2 Original line number Diff line number Diff line Loading @@ -324,7 +324,7 @@ menu "Kernel Features" config SMP bool "Symmetric Multi-Processing (EXPERIMENTAL)" depends on EXPERIMENTAL && BROKEN #&& n depends on EXPERIMENTAL && REALVIEW_MPCORE help This enables support for systems with more than one CPU. If you have a system with only one CPU, like most personal computers, say N. If Loading Loading @@ -585,7 +585,7 @@ config FPE_NWFPE config FPE_NWFPE_XP bool "Support extended precision" depends on FPE_NWFPE && !CPU_BIG_ENDIAN depends on FPE_NWFPE help Say Y to include 80-bit support in the kernel floating-point emulator. Otherwise, only 32 and 64-bit support is compiled in. Loading arch/arm/mach-ixp2000/core.c +13 −22 Original line number Diff line number Diff line Loading @@ -84,63 +84,54 @@ static struct map_desc ixp2000_io_desc[] __initdata = { .virtual = IXP2000_CAP_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_CAP_PHYS_BASE), .length = IXP2000_CAP_SIZE, .type = MT_DEVICE .type = MT_IXP2000_DEVICE, }, { .virtual = IXP2000_INTCTL_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_INTCTL_PHYS_BASE), .length = IXP2000_INTCTL_SIZE, .type = MT_DEVICE .type = MT_IXP2000_DEVICE, }, { .virtual = IXP2000_PCI_CREG_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_PCI_CREG_PHYS_BASE), .length = IXP2000_PCI_CREG_SIZE, .type = MT_DEVICE .type = MT_IXP2000_DEVICE, }, { .virtual = IXP2000_PCI_CSR_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_PCI_CSR_PHYS_BASE), .length = IXP2000_PCI_CSR_SIZE, .type = MT_DEVICE .type = MT_IXP2000_DEVICE, }, { .virtual = IXP2000_MSF_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_MSF_PHYS_BASE), .length = IXP2000_MSF_SIZE, .type = MT_DEVICE .type = MT_IXP2000_DEVICE, }, { .virtual = IXP2000_PCI_IO_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_PCI_IO_PHYS_BASE), .length = IXP2000_PCI_IO_SIZE, .type = MT_DEVICE .type = MT_IXP2000_DEVICE, }, { .virtual = IXP2000_PCI_CFG0_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_PCI_CFG0_PHYS_BASE), .length = IXP2000_PCI_CFG0_SIZE, .type = MT_DEVICE .type = MT_IXP2000_DEVICE, }, { .virtual = IXP2000_PCI_CFG1_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_PCI_CFG1_PHYS_BASE), .length = IXP2000_PCI_CFG1_SIZE, .type = MT_DEVICE .type = MT_IXP2000_DEVICE, } }; void __init ixp2000_map_io(void) { extern unsigned int processor_id; /* * On IXP2400 CPUs we need to use MT_IXP2000_DEVICE for * tweaking the PMDs so XCB=101. On IXP2800s we use the normal * PMD flags. * On IXP2400 CPUs we need to use MT_IXP2000_DEVICE so that * XCB=101 (to avoid triggering erratum #66), and given that * this mode speeds up I/O accesses and we have write buffer * flushes in the right places anyway, it doesn't hurt to use * XCB=101 for all IXP2000s. */ if ((processor_id & 0xfffffff0) == 0x69054190) { int i; printk(KERN_INFO "Enabling IXP2400 erratum #66 workaround\n"); for(i=0;i<ARRAY_SIZE(ixp2000_io_desc);i++) ixp2000_io_desc[i].type = MT_IXP2000_DEVICE; } iotable_init(ixp2000_io_desc, ARRAY_SIZE(ixp2000_io_desc)); /* Set slowport to 8-bit mode. */ Loading arch/arm/mach-realview/Kconfig +9 −0 Original line number Diff line number Diff line Loading @@ -8,4 +8,13 @@ config MACH_REALVIEW_EB help Include support for the ARM(R) RealView Emulation Baseboard platform. config REALVIEW_MPCORE bool "Support MPcore tile" depends on MACH_REALVIEW_EB help Enable support for the MPCore tile on the Realview platform. Since there are device address and interrupt differences, a kernel built with this option enabled is not compatible with other tiles. endmenu arch/arm/mach-realview/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -4,3 +4,4 @@ obj-y := core.o clock.o obj-$(CONFIG_MACH_REALVIEW_EB) += realview_eb.o obj-$(CONFIG_SMP) += platsmp.o headsmp.o arch/arm/mach-realview/core.h +1 −0 Original line number Diff line number Diff line Loading @@ -23,6 +23,7 @@ #define __ASM_ARCH_REALVIEW_H #include <asm/hardware/amba.h> #include <asm/leds.h> #include <asm/io.h> #define __io_address(n) __io(IO_ADDRESS(n)) Loading Loading
arch/arm/Kconfig +2 −2 Original line number Diff line number Diff line Loading @@ -324,7 +324,7 @@ menu "Kernel Features" config SMP bool "Symmetric Multi-Processing (EXPERIMENTAL)" depends on EXPERIMENTAL && BROKEN #&& n depends on EXPERIMENTAL && REALVIEW_MPCORE help This enables support for systems with more than one CPU. If you have a system with only one CPU, like most personal computers, say N. If Loading Loading @@ -585,7 +585,7 @@ config FPE_NWFPE config FPE_NWFPE_XP bool "Support extended precision" depends on FPE_NWFPE && !CPU_BIG_ENDIAN depends on FPE_NWFPE help Say Y to include 80-bit support in the kernel floating-point emulator. Otherwise, only 32 and 64-bit support is compiled in. Loading
arch/arm/mach-ixp2000/core.c +13 −22 Original line number Diff line number Diff line Loading @@ -84,63 +84,54 @@ static struct map_desc ixp2000_io_desc[] __initdata = { .virtual = IXP2000_CAP_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_CAP_PHYS_BASE), .length = IXP2000_CAP_SIZE, .type = MT_DEVICE .type = MT_IXP2000_DEVICE, }, { .virtual = IXP2000_INTCTL_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_INTCTL_PHYS_BASE), .length = IXP2000_INTCTL_SIZE, .type = MT_DEVICE .type = MT_IXP2000_DEVICE, }, { .virtual = IXP2000_PCI_CREG_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_PCI_CREG_PHYS_BASE), .length = IXP2000_PCI_CREG_SIZE, .type = MT_DEVICE .type = MT_IXP2000_DEVICE, }, { .virtual = IXP2000_PCI_CSR_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_PCI_CSR_PHYS_BASE), .length = IXP2000_PCI_CSR_SIZE, .type = MT_DEVICE .type = MT_IXP2000_DEVICE, }, { .virtual = IXP2000_MSF_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_MSF_PHYS_BASE), .length = IXP2000_MSF_SIZE, .type = MT_DEVICE .type = MT_IXP2000_DEVICE, }, { .virtual = IXP2000_PCI_IO_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_PCI_IO_PHYS_BASE), .length = IXP2000_PCI_IO_SIZE, .type = MT_DEVICE .type = MT_IXP2000_DEVICE, }, { .virtual = IXP2000_PCI_CFG0_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_PCI_CFG0_PHYS_BASE), .length = IXP2000_PCI_CFG0_SIZE, .type = MT_DEVICE .type = MT_IXP2000_DEVICE, }, { .virtual = IXP2000_PCI_CFG1_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_PCI_CFG1_PHYS_BASE), .length = IXP2000_PCI_CFG1_SIZE, .type = MT_DEVICE .type = MT_IXP2000_DEVICE, } }; void __init ixp2000_map_io(void) { extern unsigned int processor_id; /* * On IXP2400 CPUs we need to use MT_IXP2000_DEVICE for * tweaking the PMDs so XCB=101. On IXP2800s we use the normal * PMD flags. * On IXP2400 CPUs we need to use MT_IXP2000_DEVICE so that * XCB=101 (to avoid triggering erratum #66), and given that * this mode speeds up I/O accesses and we have write buffer * flushes in the right places anyway, it doesn't hurt to use * XCB=101 for all IXP2000s. */ if ((processor_id & 0xfffffff0) == 0x69054190) { int i; printk(KERN_INFO "Enabling IXP2400 erratum #66 workaround\n"); for(i=0;i<ARRAY_SIZE(ixp2000_io_desc);i++) ixp2000_io_desc[i].type = MT_IXP2000_DEVICE; } iotable_init(ixp2000_io_desc, ARRAY_SIZE(ixp2000_io_desc)); /* Set slowport to 8-bit mode. */ Loading
arch/arm/mach-realview/Kconfig +9 −0 Original line number Diff line number Diff line Loading @@ -8,4 +8,13 @@ config MACH_REALVIEW_EB help Include support for the ARM(R) RealView Emulation Baseboard platform. config REALVIEW_MPCORE bool "Support MPcore tile" depends on MACH_REALVIEW_EB help Enable support for the MPCore tile on the Realview platform. Since there are device address and interrupt differences, a kernel built with this option enabled is not compatible with other tiles. endmenu
arch/arm/mach-realview/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -4,3 +4,4 @@ obj-y := core.o clock.o obj-$(CONFIG_MACH_REALVIEW_EB) += realview_eb.o obj-$(CONFIG_SMP) += platsmp.o headsmp.o
arch/arm/mach-realview/core.h +1 −0 Original line number Diff line number Diff line Loading @@ -23,6 +23,7 @@ #define __ASM_ARCH_REALVIEW_H #include <asm/hardware/amba.h> #include <asm/leds.h> #include <asm/io.h> #define __io_address(n) __io(IO_ADDRESS(n)) Loading