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Commit 89c4f84b authored by Eryk Brol's avatar Eryk Brol Committed by Alex Deucher
Browse files

drm/amd/display: Restructure DCN10 hubbub 



[Why]
Change DCN10 hubbub to use hubbub as a base and allow all future DCN
hubbubs to do the same instead of using DCN10_hubbub. This increases
readability and doesn't require future hubbubs to inherit anything
other than the base hubbub struct.

[How]
Create separate DCN10_hubbub struct which uses the hubbub struct as
a base.

Signed-off-by: default avatarEryk Brol <eryk.brol@amd.com>
Reviewed-by: default avatarJun Lei <Jun.Lei@amd.com>
Acked-by: default avatarLeo Li <sunpeng.li@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent c69dffab

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c

+75 −56
Original line number Diff line number Diff line
@@ -29,19 +29,20 @@ 
#include "reg_helper.h"



#define CTX \

	hubbub->ctx

	hubbub1->base.ctx

#define DC_LOGGER \

	hubbub->ctx->logger

	hubbub1->base.ctx->logger

#define REG(reg)\

	hubbub->regs->reg

	hubbub1->regs->reg



#undef FN

#define FN(reg_name, field_name) \

	hubbub->shifts->field_name, hubbub->masks->field_name

	hubbub1->shifts->field_name, hubbub1->masks->field_name



void hubbub1_wm_read_state(struct hubbub *hubbub,

		struct dcn_hubbub_wm *wm)

{

	struct dcn10_hubbub *hubbub1 = TO_DCN10_HUBBUB(hubbub);

	struct dcn_hubbub_wm_set *s;



	memset(wm, 0, sizeof(struct dcn_hubbub_wm));
@@ -89,12 +90,14 @@ void hubbub1_wm_read_state(struct hubbub *hubbub, 


void hubbub1_disable_allow_self_refresh(struct hubbub *hubbub)

{

	struct dcn10_hubbub *hubbub1 = TO_DCN10_HUBBUB(hubbub);

	REG_UPDATE(DCHUBBUB_ARB_DRAM_STATE_CNTL,

			DCHUBBUB_ARB_ALLOW_SELF_REFRESH_FORCE_ENABLE, 0);

}



bool hububu1_is_allow_self_refresh_enabled(struct hubbub *hubbub)

{

	struct dcn10_hubbub *hubbub1 = TO_DCN10_HUBBUB(hubbub);

	uint32_t enable = 0;



	REG_GET(DCHUBBUB_ARB_DRAM_STATE_CNTL,
@@ -107,6 +110,8 @@ bool hububu1_is_allow_self_refresh_enabled(struct hubbub *hubbub) 
bool hubbub1_verify_allow_pstate_change_high(

	struct hubbub *hubbub)

{

	struct dcn10_hubbub *hubbub1 = TO_DCN10_HUBBUB(hubbub);



	/* pstate latency is ~20us so if we wait over 40us and pstate allow

	 * still not asserted, we are probably stuck and going to hang

	 *
@@ -193,7 +198,7 @@ bool hubbub1_verify_allow_pstate_change_high( 
	 * 31:    SOC pstate change request

	 */



	REG_WRITE(DCHUBBUB_TEST_DEBUG_INDEX, hubbub->debug_test_index_pstate);

	REG_WRITE(DCHUBBUB_TEST_DEBUG_INDEX, hubbub1->debug_test_index_pstate);



	for (i = 0; i < pstate_wait_timeout_us; i++) {

		debug_data = REG_READ(DCHUBBUB_TEST_DEBUG_DATA);
@@ -244,6 +249,8 @@ static uint32_t convert_and_clamp( 


void hubbub1_wm_change_req_wa(struct hubbub *hubbub)

{

	struct dcn10_hubbub *hubbub1 = TO_DCN10_HUBBUB(hubbub);



	REG_UPDATE_SEQ(DCHUBBUB_ARB_WATERMARK_CHANGE_CNTL,

			DCHUBBUB_ARB_WATERMARK_CHANGE_REQUEST, 0, 1);

}
@@ -254,7 +261,9 @@ void hubbub1_program_watermarks( 
		unsigned int refclk_mhz,

		bool safe_to_lower)

{

	uint32_t force_en = hubbub->ctx->dc->debug.disable_stutter ? 1 : 0;

	struct dcn10_hubbub *hubbub1 = TO_DCN10_HUBBUB(hubbub);



	uint32_t force_en = hubbub1->base.ctx->dc->debug.disable_stutter ? 1 : 0;

	/*

	 * Need to clamp to max of the register values (i.e. no wrap)

	 * for dcn1, all wm registers are 21-bit wide
@@ -264,8 +273,8 @@ void hubbub1_program_watermarks( 


	/* Repeat for water mark set A, B, C and D. */

	/* clock state A */

	if (safe_to_lower || watermarks->a.urgent_ns > hubbub->watermarks.a.urgent_ns) {

		hubbub->watermarks.a.urgent_ns = watermarks->a.urgent_ns;

	if (safe_to_lower || watermarks->a.urgent_ns > hubbub1->watermarks.a.urgent_ns) {

		hubbub1->watermarks.a.urgent_ns = watermarks->a.urgent_ns;

		prog_wm_value = convert_and_clamp(watermarks->a.urgent_ns,

				refclk_mhz, 0x1fffff);

		REG_WRITE(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A, prog_wm_value);
@@ -276,8 +285,8 @@ void hubbub1_program_watermarks( 
	}



	if (REG(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_A)) {

		if (safe_to_lower || watermarks->a.pte_meta_urgent_ns > hubbub->watermarks.a.pte_meta_urgent_ns) {

			hubbub->watermarks.a.pte_meta_urgent_ns = watermarks->a.pte_meta_urgent_ns;

		if (safe_to_lower || watermarks->a.pte_meta_urgent_ns > hubbub1->watermarks.a.pte_meta_urgent_ns) {

			hubbub1->watermarks.a.pte_meta_urgent_ns = watermarks->a.pte_meta_urgent_ns;

			prog_wm_value = convert_and_clamp(watermarks->a.pte_meta_urgent_ns,

					refclk_mhz, 0x1fffff);

			REG_WRITE(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_A, prog_wm_value);
@@ -289,8 +298,8 @@ void hubbub1_program_watermarks( 


	if (REG(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A)) {

		if (safe_to_lower || watermarks->a.cstate_pstate.cstate_enter_plus_exit_ns

				> hubbub->watermarks.a.cstate_pstate.cstate_enter_plus_exit_ns) {

			hubbub->watermarks.a.cstate_pstate.cstate_enter_plus_exit_ns =

				> hubbub1->watermarks.a.cstate_pstate.cstate_enter_plus_exit_ns) {

			hubbub1->watermarks.a.cstate_pstate.cstate_enter_plus_exit_ns =

					watermarks->a.cstate_pstate.cstate_enter_plus_exit_ns;

			prog_wm_value = convert_and_clamp(

					watermarks->a.cstate_pstate.cstate_enter_plus_exit_ns,
@@ -302,8 +311,8 @@ void hubbub1_program_watermarks( 
		}



		if (safe_to_lower || watermarks->a.cstate_pstate.cstate_exit_ns

				> hubbub->watermarks.a.cstate_pstate.cstate_exit_ns) {

			hubbub->watermarks.a.cstate_pstate.cstate_exit_ns =

				> hubbub1->watermarks.a.cstate_pstate.cstate_exit_ns) {

			hubbub1->watermarks.a.cstate_pstate.cstate_exit_ns =

					watermarks->a.cstate_pstate.cstate_exit_ns;

			prog_wm_value = convert_and_clamp(

					watermarks->a.cstate_pstate.cstate_exit_ns,
@@ -316,8 +325,8 @@ void hubbub1_program_watermarks( 
	}



	if (safe_to_lower || watermarks->a.cstate_pstate.pstate_change_ns

			> hubbub->watermarks.a.cstate_pstate.pstate_change_ns) {

		hubbub->watermarks.a.cstate_pstate.pstate_change_ns =

			> hubbub1->watermarks.a.cstate_pstate.pstate_change_ns) {

		hubbub1->watermarks.a.cstate_pstate.pstate_change_ns =

				watermarks->a.cstate_pstate.pstate_change_ns;

		prog_wm_value = convert_and_clamp(

				watermarks->a.cstate_pstate.pstate_change_ns,
@@ -329,8 +338,8 @@ void hubbub1_program_watermarks( 
	}



	/* clock state B */

	if (safe_to_lower || watermarks->b.urgent_ns > hubbub->watermarks.b.urgent_ns) {

		hubbub->watermarks.b.urgent_ns = watermarks->b.urgent_ns;

	if (safe_to_lower || watermarks->b.urgent_ns > hubbub1->watermarks.b.urgent_ns) {

		hubbub1->watermarks.b.urgent_ns = watermarks->b.urgent_ns;

		prog_wm_value = convert_and_clamp(watermarks->b.urgent_ns,

				refclk_mhz, 0x1fffff);

		REG_WRITE(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B, prog_wm_value);
@@ -341,8 +350,8 @@ void hubbub1_program_watermarks( 
	}



	if (REG(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_B)) {

		if (safe_to_lower || watermarks->b.pte_meta_urgent_ns > hubbub->watermarks.b.pte_meta_urgent_ns) {

			hubbub->watermarks.b.pte_meta_urgent_ns = watermarks->b.pte_meta_urgent_ns;

		if (safe_to_lower || watermarks->b.pte_meta_urgent_ns > hubbub1->watermarks.b.pte_meta_urgent_ns) {

			hubbub1->watermarks.b.pte_meta_urgent_ns = watermarks->b.pte_meta_urgent_ns;

			prog_wm_value = convert_and_clamp(watermarks->b.pte_meta_urgent_ns,

					refclk_mhz, 0x1fffff);

			REG_WRITE(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_B, prog_wm_value);
@@ -354,8 +363,8 @@ void hubbub1_program_watermarks( 


	if (REG(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B)) {

		if (safe_to_lower || watermarks->b.cstate_pstate.cstate_enter_plus_exit_ns

				> hubbub->watermarks.b.cstate_pstate.cstate_enter_plus_exit_ns) {

			hubbub->watermarks.b.cstate_pstate.cstate_enter_plus_exit_ns =

				> hubbub1->watermarks.b.cstate_pstate.cstate_enter_plus_exit_ns) {

			hubbub1->watermarks.b.cstate_pstate.cstate_enter_plus_exit_ns =

					watermarks->b.cstate_pstate.cstate_enter_plus_exit_ns;

			prog_wm_value = convert_and_clamp(

					watermarks->b.cstate_pstate.cstate_enter_plus_exit_ns,
@@ -367,8 +376,8 @@ void hubbub1_program_watermarks( 
		}



		if (safe_to_lower || watermarks->b.cstate_pstate.cstate_exit_ns

				> hubbub->watermarks.b.cstate_pstate.cstate_exit_ns) {

			hubbub->watermarks.b.cstate_pstate.cstate_exit_ns =

				> hubbub1->watermarks.b.cstate_pstate.cstate_exit_ns) {

			hubbub1->watermarks.b.cstate_pstate.cstate_exit_ns =

					watermarks->b.cstate_pstate.cstate_exit_ns;

			prog_wm_value = convert_and_clamp(

					watermarks->b.cstate_pstate.cstate_exit_ns,
@@ -381,8 +390,8 @@ void hubbub1_program_watermarks( 
	}



	if (safe_to_lower || watermarks->b.cstate_pstate.pstate_change_ns

			> hubbub->watermarks.b.cstate_pstate.pstate_change_ns) {

		hubbub->watermarks.b.cstate_pstate.pstate_change_ns =

			> hubbub1->watermarks.b.cstate_pstate.pstate_change_ns) {

		hubbub1->watermarks.b.cstate_pstate.pstate_change_ns =

				watermarks->b.cstate_pstate.pstate_change_ns;

		prog_wm_value = convert_and_clamp(

				watermarks->b.cstate_pstate.pstate_change_ns,
@@ -394,8 +403,8 @@ void hubbub1_program_watermarks( 
	}



	/* clock state C */

	if (safe_to_lower || watermarks->c.urgent_ns > hubbub->watermarks.c.urgent_ns) {

		hubbub->watermarks.c.urgent_ns = watermarks->c.urgent_ns;

	if (safe_to_lower || watermarks->c.urgent_ns > hubbub1->watermarks.c.urgent_ns) {

		hubbub1->watermarks.c.urgent_ns = watermarks->c.urgent_ns;

		prog_wm_value = convert_and_clamp(watermarks->c.urgent_ns,

				refclk_mhz, 0x1fffff);

		REG_WRITE(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C, prog_wm_value);
@@ -406,8 +415,8 @@ void hubbub1_program_watermarks( 
	}



	if (REG(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_C)) {

		if (safe_to_lower || watermarks->c.pte_meta_urgent_ns > hubbub->watermarks.c.pte_meta_urgent_ns) {

			hubbub->watermarks.c.pte_meta_urgent_ns = watermarks->c.pte_meta_urgent_ns;

		if (safe_to_lower || watermarks->c.pte_meta_urgent_ns > hubbub1->watermarks.c.pte_meta_urgent_ns) {

			hubbub1->watermarks.c.pte_meta_urgent_ns = watermarks->c.pte_meta_urgent_ns;

			prog_wm_value = convert_and_clamp(watermarks->c.pte_meta_urgent_ns,

					refclk_mhz, 0x1fffff);

			REG_WRITE(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_C, prog_wm_value);
@@ -419,8 +428,8 @@ void hubbub1_program_watermarks( 


	if (REG(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C)) {

		if (safe_to_lower || watermarks->c.cstate_pstate.cstate_enter_plus_exit_ns

				> hubbub->watermarks.c.cstate_pstate.cstate_enter_plus_exit_ns) {

			hubbub->watermarks.c.cstate_pstate.cstate_enter_plus_exit_ns =

				> hubbub1->watermarks.c.cstate_pstate.cstate_enter_plus_exit_ns) {

			hubbub1->watermarks.c.cstate_pstate.cstate_enter_plus_exit_ns =

					watermarks->c.cstate_pstate.cstate_enter_plus_exit_ns;

			prog_wm_value = convert_and_clamp(

					watermarks->c.cstate_pstate.cstate_enter_plus_exit_ns,
@@ -432,8 +441,8 @@ void hubbub1_program_watermarks( 
		}



		if (safe_to_lower || watermarks->c.cstate_pstate.cstate_exit_ns

				> hubbub->watermarks.c.cstate_pstate.cstate_exit_ns) {

			hubbub->watermarks.c.cstate_pstate.cstate_exit_ns =

				> hubbub1->watermarks.c.cstate_pstate.cstate_exit_ns) {

			hubbub1->watermarks.c.cstate_pstate.cstate_exit_ns =

					watermarks->c.cstate_pstate.cstate_exit_ns;

			prog_wm_value = convert_and_clamp(

					watermarks->c.cstate_pstate.cstate_exit_ns,
@@ -446,8 +455,8 @@ void hubbub1_program_watermarks( 
	}



	if (safe_to_lower || watermarks->c.cstate_pstate.pstate_change_ns

			> hubbub->watermarks.c.cstate_pstate.pstate_change_ns) {

		hubbub->watermarks.c.cstate_pstate.pstate_change_ns =

			> hubbub1->watermarks.c.cstate_pstate.pstate_change_ns) {

		hubbub1->watermarks.c.cstate_pstate.pstate_change_ns =

				watermarks->c.cstate_pstate.pstate_change_ns;

		prog_wm_value = convert_and_clamp(

				watermarks->c.cstate_pstate.pstate_change_ns,
@@ -459,8 +468,8 @@ void hubbub1_program_watermarks( 
	}



	/* clock state D */

	if (safe_to_lower || watermarks->d.urgent_ns > hubbub->watermarks.d.urgent_ns) {

		hubbub->watermarks.d.urgent_ns = watermarks->d.urgent_ns;

	if (safe_to_lower || watermarks->d.urgent_ns > hubbub1->watermarks.d.urgent_ns) {

		hubbub1->watermarks.d.urgent_ns = watermarks->d.urgent_ns;

		prog_wm_value = convert_and_clamp(watermarks->d.urgent_ns,

				refclk_mhz, 0x1fffff);

		REG_WRITE(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D, prog_wm_value);
@@ -471,8 +480,8 @@ void hubbub1_program_watermarks( 
	}



	if (REG(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_D)) {

		if (safe_to_lower || watermarks->d.pte_meta_urgent_ns > hubbub->watermarks.d.pte_meta_urgent_ns) {

			hubbub->watermarks.d.pte_meta_urgent_ns = watermarks->d.pte_meta_urgent_ns;

		if (safe_to_lower || watermarks->d.pte_meta_urgent_ns > hubbub1->watermarks.d.pte_meta_urgent_ns) {

			hubbub1->watermarks.d.pte_meta_urgent_ns = watermarks->d.pte_meta_urgent_ns;

			prog_wm_value = convert_and_clamp(watermarks->d.pte_meta_urgent_ns,

					refclk_mhz, 0x1fffff);

			REG_WRITE(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_D, prog_wm_value);
@@ -484,8 +493,8 @@ void hubbub1_program_watermarks( 


	if (REG(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D)) {

		if (safe_to_lower || watermarks->d.cstate_pstate.cstate_enter_plus_exit_ns

				> hubbub->watermarks.d.cstate_pstate.cstate_enter_plus_exit_ns) {

			hubbub->watermarks.d.cstate_pstate.cstate_enter_plus_exit_ns =

				> hubbub1->watermarks.d.cstate_pstate.cstate_enter_plus_exit_ns) {

			hubbub1->watermarks.d.cstate_pstate.cstate_enter_plus_exit_ns =

					watermarks->d.cstate_pstate.cstate_enter_plus_exit_ns;

			prog_wm_value = convert_and_clamp(

					watermarks->d.cstate_pstate.cstate_enter_plus_exit_ns,
@@ -497,8 +506,8 @@ void hubbub1_program_watermarks( 
		}



		if (safe_to_lower || watermarks->d.cstate_pstate.cstate_exit_ns

				> hubbub->watermarks.d.cstate_pstate.cstate_exit_ns) {

			hubbub->watermarks.d.cstate_pstate.cstate_exit_ns =

				> hubbub1->watermarks.d.cstate_pstate.cstate_exit_ns) {

			hubbub1->watermarks.d.cstate_pstate.cstate_exit_ns =

					watermarks->d.cstate_pstate.cstate_exit_ns;

			prog_wm_value = convert_and_clamp(

					watermarks->d.cstate_pstate.cstate_exit_ns,
@@ -511,8 +520,8 @@ void hubbub1_program_watermarks( 
	}



	if (safe_to_lower || watermarks->d.cstate_pstate.pstate_change_ns

			> hubbub->watermarks.d.cstate_pstate.pstate_change_ns) {

		hubbub->watermarks.d.cstate_pstate.pstate_change_ns =

			> hubbub1->watermarks.d.cstate_pstate.pstate_change_ns) {

		hubbub1->watermarks.d.cstate_pstate.pstate_change_ns =

				watermarks->d.cstate_pstate.pstate_change_ns;

		prog_wm_value = convert_and_clamp(

				watermarks->d.cstate_pstate.pstate_change_ns,
@@ -543,6 +552,8 @@ void hubbub1_update_dchub( 
	struct hubbub *hubbub,

	struct dchub_init_data *dh_data)

{

	struct dcn10_hubbub *hubbub1 = TO_DCN10_HUBBUB(hubbub);



	if (REG(DCHUBBUB_SDPIF_FB_TOP) == 0) {

		ASSERT(false);

		/*should not come here*/
@@ -602,6 +613,8 @@ void hubbub1_update_dchub( 


void hubbub1_toggle_watermark_change_req(struct hubbub *hubbub)

{

	struct dcn10_hubbub *hubbub1 = TO_DCN10_HUBBUB(hubbub);



	uint32_t watermark_change_req;



	REG_GET(DCHUBBUB_ARB_WATERMARK_CHANGE_CNTL,
@@ -618,6 +631,8 @@ void hubbub1_toggle_watermark_change_req(struct hubbub *hubbub) 


void hubbub1_soft_reset(struct hubbub *hubbub, bool reset)

{

	struct dcn10_hubbub *hubbub1 = TO_DCN10_HUBBUB(hubbub);



	uint32_t reset_en = reset ? 1 : 0;



	REG_UPDATE(DCHUBBUB_SOFT_RESET,
@@ -760,7 +775,9 @@ static bool hubbub1_get_dcc_compression_cap(struct hubbub *hubbub, 
		const struct dc_dcc_surface_param *input,

		struct dc_surface_dcc_cap *output)

{

	struct dc *dc = hubbub->ctx->dc;

	struct dcn10_hubbub *hubbub1 = TO_DCN10_HUBBUB(hubbub);

	struct dc *dc = hubbub1->base.ctx->dc;



	/* implement section 1.6.2.1 of DCN1_Programming_Guide.docx */

	enum dcc_control dcc_control;

	unsigned int bpe;
@@ -772,10 +789,10 @@ static bool hubbub1_get_dcc_compression_cap(struct hubbub *hubbub, 
	if (dc->debug.disable_dcc == DCC_DISABLE)

		return false;



	if (!hubbub->funcs->dcc_support_pixel_format(input->format, &bpe))

	if (!hubbub1->base.funcs->dcc_support_pixel_format(input->format, &bpe))

		return false;



	if (!hubbub->funcs->dcc_support_swizzle(input->swizzle_mode, bpe,

	if (!hubbub1->base.funcs->dcc_support_swizzle(input->swizzle_mode, bpe,

			&segment_order_horz, &segment_order_vert))

		return false;
@@ -854,18 +871,20 @@ void hubbub1_construct(struct hubbub *hubbub, 
	const struct dcn_hubbub_shift *hubbub_shift,

	const struct dcn_hubbub_mask *hubbub_mask)

{

	hubbub->ctx = ctx;

	struct dcn10_hubbub *hubbub1 = TO_DCN10_HUBBUB(hubbub);



	hubbub1->base.ctx = ctx;



	hubbub->funcs = &hubbub1_funcs;

	hubbub1->base.funcs = &hubbub1_funcs;



	hubbub->regs = hubbub_regs;

	hubbub->shifts = hubbub_shift;

	hubbub->masks = hubbub_mask;

	hubbub1->regs = hubbub_regs;

	hubbub1->shifts = hubbub_shift;

	hubbub1->masks = hubbub_mask;



	hubbub->debug_test_index_pstate = 0x7;

	hubbub1->debug_test_index_pstate = 0x7;

#if defined(CONFIG_DRM_AMD_DC_DCN1_01)

	if (ctx->dce_version == DCN_VERSION_1_01)

		hubbub->debug_test_index_pstate = 0xB;

		hubbub1->debug_test_index_pstate = 0xB;

#endif

}

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h

+5 −4
Original line number Diff line number Diff line
@@ -29,6 +29,9 @@ 
#include "core_types.h"

#include "dchubbub.h"



#define TO_DCN10_HUBBUB(hubbub)\

	container_of(hubbub, struct dcn10_hubbub, base)



#define HUBHUB_REG_LIST_DCN()\

	SR(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A),\

	SR(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_A),\
@@ -165,10 +168,8 @@ struct dcn_hubbub_mask { 


struct dc;





struct hubbub {

	const struct hubbub_funcs *funcs;

	struct dc_context *ctx;

struct dcn10_hubbub {

	struct hubbub base;

	const struct dcn_hubbub_registers *regs;

	const struct dcn_hubbub_shift *shifts;

	const struct dcn_hubbub_mask *masks;

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c

+4 −4
Original line number Diff line number Diff line
@@ -678,18 +678,18 @@ static struct mpc *dcn10_mpc_create(struct dc_context *ctx) 


static struct hubbub *dcn10_hubbub_create(struct dc_context *ctx)

{

	struct hubbub *hubbub = kzalloc(sizeof(struct hubbub),

	struct dcn10_hubbub *dcn10_hubbub = kzalloc(sizeof(struct dcn10_hubbub),

					  GFP_KERNEL);



	if (!hubbub)

	if (!dcn10_hubbub)

		return NULL;



	hubbub1_construct(hubbub, ctx,

	hubbub1_construct(&dcn10_hubbub->base, ctx,

			&hubbub_reg,

			&hubbub_shift,

			&hubbub_mask);



	return hubbub;

	return &dcn10_hubbub->base;

}



static struct timing_generator *dcn10_timing_generator_create(

drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h

+4 −0
Original line number Diff line number Diff line
@@ -75,5 +75,9 @@ struct hubbub_funcs { 
			struct dcn_hubbub_wm *wm);

};



struct hubbub {

	const struct hubbub_funcs *funcs;

	struct dc_context *ctx;

};



#endif