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Commit 89bbc6f1 authored by Tony Lindgren's avatar Tony Lindgren
Browse files

ARM: dts: Fix incorrect dcan register mapping for am3, am4 and dra7 



We are currently using a wrong register for dcan revision. Although
this is currently only used for detecting the dcan module, let's
fix it to avoid confusion.

Tested-by: default avatarKeerthy <j-keerthy@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 2e8647bb

arch/arm/boot/dts/am33xx-l4.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -1758,6 +1758,8 @@ 


		target-module@cc000 {			/* 0x481cc000, ap 60 46.0 */

			compatible = "ti,sysc-omap4", "ti,sysc";

			reg = <0xcc020 0x4>;

			reg-names = "rev";

			ti,hwmods = "d_can0";

			/* Domains (P, C): per_pwrdm, l4ls_clkdm */

			clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN0_CLKCTRL 0>,
@@ -1780,6 +1782,8 @@ 


		target-module@d0000 {			/* 0x481d0000, ap 62 42.0 */

			compatible = "ti,sysc-omap4", "ti,sysc";

			reg = <0xd0020 0x4>;

			reg-names = "rev";

			ti,hwmods = "d_can1";

			/* Domains (P, C): per_pwrdm, l4ls_clkdm */

			clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN1_CLKCTRL 0>,

arch/arm/boot/dts/am437x-l4.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -1574,6 +1574,8 @@ 


		target-module@cc000 {			/* 0x481cc000, ap 50 46.0 */

			compatible = "ti,sysc-omap4", "ti,sysc";

			reg = <0xcc020 0x4>;

			reg-names = "rev";

			ti,hwmods = "d_can0";

			/* Domains (P, C): per_pwrdm, l4ls_clkdm */

			clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN0_CLKCTRL 0>;
@@ -1593,6 +1595,8 @@ 


		target-module@d0000 {			/* 0x481d0000, ap 52 3a.0 */

			compatible = "ti,sysc-omap4", "ti,sysc";

			reg = <0xd0020 0x4>;

			reg-names = "rev";

			ti,hwmods = "d_can1";

			/* Domains (P, C): per_pwrdm, l4ls_clkdm */

			clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN1_CLKCTRL 0>;

arch/arm/boot/dts/dra7-l4.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -3025,7 +3025,7 @@ 


		target-module@80000 {			/* 0x48480000, ap 31 16.0 */

			compatible = "ti,sysc-omap4", "ti,sysc";

			reg = <0x80000 0x4>;

			reg = <0x80020 0x4>;

			reg-names = "rev";

			clocks = <&l4per2_clkctrl DRA7_L4PER2_DCAN2_CLKCTRL 0>;

			clock-names = "fck";
@@ -4577,7 +4577,7 @@ 


		target-module@c000 {			/* 0x4ae3c000, ap 30 04.0 */

			compatible = "ti,sysc-omap4", "ti,sysc";

			reg = <0xc000 0x4>;

			reg = <0xc020 0x4>;

			reg-names = "rev";

			clocks = <&wkupaon_clkctrl DRA7_WKUPAON_DCAN1_CLKCTRL 0>;

			clock-names = "fck";

drivers/bus/ti-sysc.c

+2 −1
Original line number Diff line number Diff line
@@ -1267,7 +1267,8 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = { 
	SYSC_QUIRK("control", 0, 0, 0x10, -1, 0x40000900, 0xffffffff, 0),

	SYSC_QUIRK("cpgmac", 0, 0x1200, 0x1208, 0x1204, 0x4edb1902,

		   0xffff00f0, 0),

	SYSC_QUIRK("dcan", 0, 0, -1, -1, 0xffffffff, 0xffffffff, 0),

	SYSC_QUIRK("dcan", 0, 0x20, -1, -1, 0xa3170504, 0xffffffff, 0),

	SYSC_QUIRK("dcan", 0, 0x20, -1, -1, 0x4edb1902, 0xffffffff, 0),

	SYSC_QUIRK("dmic", 0, 0, 0x10, -1, 0x50010000, 0xffffffff, 0),

	SYSC_QUIRK("dwc3", 0, 0, 0x10, -1, 0x500a0200, 0xffffffff, 0),

	SYSC_QUIRK("epwmss", 0, 0, 0x4, -1, 0x47400001, 0xffffffff, 0),