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Commit 895833bd authored by Tvrtko Ursulin's avatar Tvrtko Ursulin
Browse files

drm/i915: Remove identical macros 



Remove some macros which are now obviously identical.

v2: Added HAS_FWTABLE macro and simplified intel_uncore_forcewake_for_read.
    (Joonas Lahtinen)

Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent 15157970

drivers/gpu/drm/i915/intel_uncore.c

+20 −50
Original line number Diff line number Diff line
@@ -639,6 +639,11 @@ intel_fw_table_check(struct drm_i915_private *dev_priv) 
#define GEN_FW_RANGE(s, e, d) \

	{ .start = (s), .end = (e), .domains = (d) }



#define HAS_FWTABLE(dev_priv) \

	(IS_GEN9(dev_priv) || \

	 IS_CHERRYVIEW(dev_priv) || \

	 IS_VALLEYVIEW(dev_priv))



/* *Must* be sorted by offset ranges! See intel_fw_table_check(). */

static const struct intel_forcewake_range __vlv_fw_ranges[] = {

	GEN_FW_RANGE(0x2000, 0x3fff, FORCEWAKE_RENDER),
@@ -650,7 +655,7 @@ static const struct intel_forcewake_range __vlv_fw_ranges[] = { 
	GEN_FW_RANGE(0x30000, 0x3ffff, FORCEWAKE_MEDIA),

};



#define __vlv_reg_read_fw_domains(offset) \

#define __fwtable_reg_read_fw_domains(offset) \

({ \

	enum forcewake_domains __fwd = 0; \

	if (NEEDS_FORCE_WAKE((offset))) \
@@ -708,14 +713,6 @@ static const struct intel_forcewake_range __chv_fw_ranges[] = { 
	GEN_FW_RANGE(0x30000, 0x37fff, FORCEWAKE_MEDIA),

};



#define __chv_reg_read_fw_domains(offset) \

({ \

	enum forcewake_domains __fwd = 0; \

	if (NEEDS_FORCE_WAKE((offset))) \

		__fwd = find_fw_domain(dev_priv, offset); \

	__fwd; \

})



#define __chv_reg_write_fw_domains(offset) \

({ \

	enum forcewake_domains __fwd = 0; \
@@ -760,14 +757,6 @@ static const struct intel_forcewake_range __gen9_fw_ranges[] = { 
	GEN_FW_RANGE(0x30000, 0x3ffff, FORCEWAKE_MEDIA),

};



#define __gen9_reg_read_fw_domains(offset) \

({ \

	enum forcewake_domains __fwd = 0; \

	if (NEEDS_FORCE_WAKE((offset))) \

		__fwd = find_fw_domain(dev_priv, offset); \

	__fwd; \

})



static const i915_reg_t gen9_shadowed_regs[] = {

	RING_TAIL(RENDER_RING_BASE),

	RING_TAIL(GEN6_BSD_RING_BASE),
@@ -927,7 +916,7 @@ static u##x \ 
vlv_read##x(struct drm_i915_private *dev_priv, i915_reg_t reg, bool trace) { \

	enum forcewake_domains fw_engine; \

	GEN6_READ_HEADER(x); \

	fw_engine = __vlv_reg_read_fw_domains(offset); \

	fw_engine = __fwtable_reg_read_fw_domains(offset); \

	if (fw_engine) \

		__force_wake_auto(dev_priv, fw_engine); \

	val = __raw_i915_read##x(dev_priv, reg); \
@@ -939,7 +928,7 @@ static u##x \ 
chv_read##x(struct drm_i915_private *dev_priv, i915_reg_t reg, bool trace) { \

	enum forcewake_domains fw_engine; \

	GEN6_READ_HEADER(x); \

	fw_engine = __chv_reg_read_fw_domains(offset); \

	fw_engine = __fwtable_reg_read_fw_domains(offset); \

	if (fw_engine) \

		__force_wake_auto(dev_priv, fw_engine); \

	val = __raw_i915_read##x(dev_priv, reg); \
@@ -951,7 +940,7 @@ static u##x \ 
gen9_read##x(struct drm_i915_private *dev_priv, i915_reg_t reg, bool trace) { \

	enum forcewake_domains fw_engine; \

	GEN6_READ_HEADER(x); \

	fw_engine = __gen9_reg_read_fw_domains(offset); \

	fw_engine = __fwtable_reg_read_fw_domains(offset); \

	if (fw_engine) \

		__force_wake_auto(dev_priv, fw_engine); \

	val = __raw_i915_read##x(dev_priv, reg); \
@@ -1823,35 +1812,16 @@ static enum forcewake_domains 
intel_uncore_forcewake_for_read(struct drm_i915_private *dev_priv,

				i915_reg_t reg)

{

	u32 offset = i915_mmio_reg_offset(reg);

	enum forcewake_domains fw_domains;



	if (intel_vgpu_active(dev_priv))

		return 0;



	switch (INTEL_GEN(dev_priv)) {

	case 9:

		fw_domains = __gen9_reg_read_fw_domains(i915_mmio_reg_offset(reg));

		break;

	case 8:

		if (IS_CHERRYVIEW(dev_priv))

			fw_domains = __chv_reg_read_fw_domains(i915_mmio_reg_offset(reg));

		else

			fw_domains = __gen6_reg_read_fw_domains(i915_mmio_reg_offset(reg));

		break;

	case 7:

	case 6:

		if (IS_VALLEYVIEW(dev_priv))

			fw_domains = __vlv_reg_read_fw_domains(i915_mmio_reg_offset(reg));

		else

			fw_domains = __gen6_reg_read_fw_domains(i915_mmio_reg_offset(reg));

		break;

	default:

		MISSING_CASE(INTEL_INFO(dev_priv)->gen);

	case 5: /* forcewake was introduced with gen6 */

	case 4:

	case 3:

	case 2:

		return 0;

	if (HAS_FWTABLE(dev_priv)) {

		fw_domains = __fwtable_reg_read_fw_domains(offset);

	} else if (INTEL_GEN(dev_priv) >= 6) {

		fw_domains = __gen6_reg_read_fw_domains(offset);

	} else {

		WARN_ON(!IS_GEN(dev_priv, 2, 5));

		fw_domains = 0;

	}



	WARN_ON(fw_domains & ~dev_priv->uncore.fw_domains);
@@ -1865,9 +1835,6 @@ intel_uncore_forcewake_for_write(struct drm_i915_private *dev_priv, 
{

	enum forcewake_domains fw_domains;



	if (intel_vgpu_active(dev_priv))

		return 0;



	switch (INTEL_GEN(dev_priv)) {

	case 9:

		fw_domains = __gen9_reg_write_fw_domains(i915_mmio_reg_offset(reg));
@@ -1918,6 +1885,9 @@ intel_uncore_forcewake_for_reg(struct drm_i915_private *dev_priv, 


	WARN_ON(!op);



	if (intel_vgpu_active(dev_priv))

		return 0;



	if (op & FW_REG_READ)

		fw_domains = intel_uncore_forcewake_for_read(dev_priv, reg);