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Commit 88fc3718 authored by Fenglin Wu's avatar Fenglin Wu
Browse files

input: qcom-hv-haptics: Deglitch fifo-empty interrupt 



Check INT_RT_STS in FIFO empty IRQ handler and ignore the interrupt
if FIFO_EMPTY real time status bit is not set.

Change-Id: I7a276fa1d8c79d530fc26f74263e0608096a99f8
Signed-off-by: default avatarFenglin Wu <fenglinw@codeaurora.org>
parent 327de868

drivers/input/misc/qcom-hv-haptics.c

+15 −1
Original line number Diff line number Diff line
@@ -46,6 +46,9 @@ 
#define AUTO_RES_ERROR_BIT			BIT(1)

#define HPRW_RDY_FAULT_BIT			BIT(0)



#define HAP_CFG_INT_RT_STS_REG			0x10

#define FIFO_EMPTY_BIT				BIT(1)



/* config register definitions in HAPTICS_CFG module */

#define HAP_CFG_DRV_CTRL_REG			0x47

#define PSTG_DLY_MASK				GENMASK(7, 6)
@@ -1919,9 +1922,20 @@ static irqreturn_t fifo_empty_irq_handler(int irq, void *data) 
	struct fifo_cfg *fifo = chip->play.effect->fifo;

	struct fifo_play_status *status = &chip->play.fifo_status;

	u32 samples_left;

	u8 *samples;

	u8 *samples, val;

	int rc, num;



	rc = haptics_read(chip, chip->cfg_addr_base,

			HAP_CFG_INT_RT_STS_REG, &val, 1);

	if (rc < 0)

		return IRQ_HANDLED;



	if (!(val & FIFO_EMPTY_BIT)) {

		dev_dbg(chip->dev, "Ignore spurious/falling IRQ, INT_RT_STS = %#x\n",

				val);

		return IRQ_HANDLED;

	}



	if (atomic_read(&chip->play.fifo_status.written_done) == 1) {

		/*

		 * Check the FIFO real time fill status before stopping