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Commit 88d2ba2e authored by Tvrtko Ursulin's avatar Tvrtko Ursulin
Browse files

drm/i915: Move common engine setup into intel_engine_cs.c 



Common code deserves to be put in a separate file from legacy and
execlists implementation for clarity and ease of maintenance.

Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris-wilson.co.uk>
parent acd27845

drivers/gpu/drm/i915/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -40,6 +40,7 @@ i915-y += i915_cmd_parser.o \ 
	  i915_gpu_error.o \

	  i915_trace_points.o \

	  intel_breadcrumbs.o \

	  intel_engine_cs.o \

	  intel_lrc.o \

	  intel_mocs.o \

	  intel_ringbuffer.o \

drivers/gpu/drm/i915/intel_engine_cs.c

0 → 100644
+162 −0
Original line number Diff line number Diff line 
/*

 * Copyright © 2016 Intel Corporation

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice (including the next

 * paragraph) shall be included in all copies or substantial portions of the

 * Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL

 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER

 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING

 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS

 * IN THE SOFTWARE.

 *

 */



#include "i915_drv.h"

#include "intel_ringbuffer.h"

#include "intel_lrc.h"



static const struct engine_info {

	const char *name;

	unsigned exec_id;

	unsigned guc_id;

	u32 mmio_base;

	unsigned irq_shift;

	int (*init_legacy)(struct intel_engine_cs *engine);

	int (*init_execlists)(struct intel_engine_cs *engine);

} intel_engines[] = {

	[RCS] = {

		.name = "render ring",

		.exec_id = I915_EXEC_RENDER,

		.guc_id = GUC_RENDER_ENGINE,

		.mmio_base = RENDER_RING_BASE,

		.irq_shift = GEN8_RCS_IRQ_SHIFT,

		.init_execlists = logical_render_ring_init,

		.init_legacy = intel_init_render_ring_buffer,

	},

	[BCS] = {

		.name = "blitter ring",

		.exec_id = I915_EXEC_BLT,

		.guc_id = GUC_BLITTER_ENGINE,

		.mmio_base = BLT_RING_BASE,

		.irq_shift = GEN8_BCS_IRQ_SHIFT,

		.init_execlists = logical_xcs_ring_init,

		.init_legacy = intel_init_blt_ring_buffer,

	},

	[VCS] = {

		.name = "bsd ring",

		.exec_id = I915_EXEC_BSD,

		.guc_id = GUC_VIDEO_ENGINE,

		.mmio_base = GEN6_BSD_RING_BASE,

		.irq_shift = GEN8_VCS1_IRQ_SHIFT,

		.init_execlists = logical_xcs_ring_init,

		.init_legacy = intel_init_bsd_ring_buffer,

	},

	[VCS2] = {

		.name = "bsd2 ring",

		.exec_id = I915_EXEC_BSD,

		.guc_id = GUC_VIDEO_ENGINE2,

		.mmio_base = GEN8_BSD2_RING_BASE,

		.irq_shift = GEN8_VCS2_IRQ_SHIFT,

		.init_execlists = logical_xcs_ring_init,

		.init_legacy = intel_init_bsd2_ring_buffer,

	},

	[VECS] = {

		.name = "video enhancement ring",

		.exec_id = I915_EXEC_VEBOX,

		.guc_id = GUC_VIDEOENHANCE_ENGINE,

		.mmio_base = VEBOX_RING_BASE,

		.irq_shift = GEN8_VECS_IRQ_SHIFT,

		.init_execlists = logical_xcs_ring_init,

		.init_legacy = intel_init_vebox_ring_buffer,

	},

};



static struct intel_engine_cs *

intel_engine_setup(struct drm_i915_private *dev_priv,

		   enum intel_engine_id id)

{

	const struct engine_info *info = &intel_engines[id];

	struct intel_engine_cs *engine = &dev_priv->engine[id];



	engine->id = id;

	engine->i915 = dev_priv;

	engine->name = info->name;

	engine->exec_id = info->exec_id;

	engine->hw_id = engine->guc_id = info->guc_id;

	engine->mmio_base = info->mmio_base;

	engine->irq_shift = info->irq_shift;



	return engine;

}



/**

 * intel_engines_init() - allocate, populate and init the Engine Command Streamers

 * @dev: DRM device.

 *

 * Return: non-zero if the initialization failed.

 */

int intel_engines_init(struct drm_device *dev)

{

	struct drm_i915_private *dev_priv = to_i915(dev);

	unsigned int mask = 0;

	int (*init)(struct intel_engine_cs *engine);

	unsigned int i;

	int ret;



	WARN_ON(INTEL_INFO(dev_priv)->ring_mask &

		GENMASK(sizeof(mask) * BITS_PER_BYTE - 1, I915_NUM_ENGINES));



	for (i = 0; i < ARRAY_SIZE(intel_engines); i++) {

		if (!HAS_ENGINE(dev_priv, i))

			continue;



		if (i915.enable_execlists)

			init = intel_engines[i].init_execlists;

		else

			init = intel_engines[i].init_legacy;



		if (!init)

			continue;



		ret = init(intel_engine_setup(dev_priv, i));

		if (ret)

			goto cleanup;



		mask |= ENGINE_MASK(i);

	}



	/*

	 * Catch failures to update intel_engines table when the new engines

	 * are added to the driver by a warning and disabling the forgotten

	 * engines.

	 */

	if (WARN_ON(mask != INTEL_INFO(dev_priv)->ring_mask)) {

		struct intel_device_info *info =

			(struct intel_device_info *)&dev_priv->info;

		info->ring_mask = mask;

	}



	return 0;



cleanup:

	for (i = 0; i < I915_NUM_ENGINES; i++) {

		if (i915.enable_execlists)

			intel_logical_ring_cleanup(&dev_priv->engine[i]);

		else

			intel_cleanup_engine(&dev_priv->engine[i]);

	}



	return ret;

}

drivers/gpu/drm/i915/intel_lrc.c

+2 −136
Original line number Diff line number Diff line
@@ -2083,7 +2083,7 @@ logical_ring_init(struct intel_engine_cs *engine) 
	return ret;

}



static int logical_render_ring_init(struct intel_engine_cs *engine)

int logical_render_ring_init(struct intel_engine_cs *engine)

{

	struct drm_i915_private *dev_priv = engine->i915;

	int ret;
@@ -2126,147 +2126,13 @@ static int logical_render_ring_init(struct intel_engine_cs *engine) 
	return ret;

}



static int logical_xcs_ring_init(struct intel_engine_cs *engine)

int logical_xcs_ring_init(struct intel_engine_cs *engine)

{

	logical_ring_setup(engine);



	return logical_ring_init(engine);

}



static const struct engine_info {

	const char *name;

	unsigned exec_id;

	unsigned guc_id;

	u32 mmio_base;

	unsigned irq_shift;

	int (*init_legacy)(struct intel_engine_cs *engine);

	int (*init_execlists)(struct intel_engine_cs *engine);

} intel_engines[] = {

	[RCS] = {

		.name = "render ring",

		.exec_id = I915_EXEC_RENDER,

		.guc_id = GUC_RENDER_ENGINE,

		.mmio_base = RENDER_RING_BASE,

		.irq_shift = GEN8_RCS_IRQ_SHIFT,

		.init_execlists = logical_render_ring_init,

		.init_legacy = intel_init_render_ring_buffer,

	},

	[BCS] = {

		.name = "blitter ring",

		.exec_id = I915_EXEC_BLT,

		.guc_id = GUC_BLITTER_ENGINE,

		.mmio_base = BLT_RING_BASE,

		.irq_shift = GEN8_BCS_IRQ_SHIFT,

		.init_execlists = logical_xcs_ring_init,

		.init_legacy = intel_init_blt_ring_buffer,

	},

	[VCS] = {

		.name = "bsd ring",

		.exec_id = I915_EXEC_BSD,

		.guc_id = GUC_VIDEO_ENGINE,

		.mmio_base = GEN6_BSD_RING_BASE,

		.irq_shift = GEN8_VCS1_IRQ_SHIFT,

		.init_execlists = logical_xcs_ring_init,

		.init_legacy = intel_init_bsd_ring_buffer,

	},

	[VCS2] = {

		.name = "bsd2 ring",

		.exec_id = I915_EXEC_BSD,

		.guc_id = GUC_VIDEO_ENGINE2,

		.mmio_base = GEN8_BSD2_RING_BASE,

		.irq_shift = GEN8_VCS2_IRQ_SHIFT,

		.init_execlists = logical_xcs_ring_init,

		.init_legacy = intel_init_bsd2_ring_buffer,

	},

	[VECS] = {

		.name = "video enhancement ring",

		.exec_id = I915_EXEC_VEBOX,

		.guc_id = GUC_VIDEOENHANCE_ENGINE,

		.mmio_base = VEBOX_RING_BASE,

		.irq_shift = GEN8_VECS_IRQ_SHIFT,

		.init_execlists = logical_xcs_ring_init,

		.init_legacy = intel_init_vebox_ring_buffer,

	},

};



struct intel_engine_cs *

intel_engine_setup(struct drm_i915_private *dev_priv,

		   enum intel_engine_id id)

{

	const struct engine_info *info = &intel_engines[id];

	struct intel_engine_cs *engine = &dev_priv->engine[id];



	engine->id = id;

	engine->i915 = dev_priv;

	engine->name = info->name;

	engine->exec_id = info->exec_id;

	engine->hw_id = engine->guc_id = info->guc_id;

	engine->mmio_base = info->mmio_base;

	engine->irq_shift = info->irq_shift;



	return engine;

}



/**

 * intel_engines_init() - allocate, populate and init the Engine Command Streamers

 * @dev: DRM device.

 *

 * Return: non-zero if the initialization failed.

 */

int intel_engines_init(struct drm_device *dev)

{

	struct drm_i915_private *dev_priv = to_i915(dev);

	unsigned int mask = 0;

	int (*init)(struct intel_engine_cs *engine);

	unsigned int i;

	int ret;



	WARN_ON(INTEL_INFO(dev_priv)->ring_mask &

		GENMASK(sizeof(mask) * BITS_PER_BYTE - 1, I915_NUM_ENGINES));



	for (i = 0; i < ARRAY_SIZE(intel_engines); i++) {

		if (!HAS_ENGINE(dev_priv, i))

			continue;



		if (i915.enable_execlists)

			init = intel_engines[i].init_execlists;

		else

			init = intel_engines[i].init_legacy;



		if (!init)

			continue;



		ret = init(intel_engine_setup(dev_priv, i));

		if (ret)

			goto cleanup;



		mask |= ENGINE_MASK(i);

	}



	/*

	 * Catch failures to update intel_engines table when the new engines

	 * are added to the driver by a warning and disabling the forgotten

	 * engines.

	 */

	if (WARN_ON(mask != INTEL_INFO(dev_priv)->ring_mask)) {

		struct intel_device_info *info =

			(struct intel_device_info *)&dev_priv->info;

		info->ring_mask = mask;

	}



	return 0;



cleanup:

	for (i = 0; i < I915_NUM_ENGINES; i++) {

		if (i915.enable_execlists)

			intel_logical_ring_cleanup(&dev_priv->engine[i]);

		else

			intel_cleanup_engine(&dev_priv->engine[i]);

	}



	return ret;

}



static u32

make_rpcs(struct drm_i915_private *dev_priv)

{

drivers/gpu/drm/i915/intel_lrc.h

+3 −0
Original line number Diff line number Diff line
@@ -67,6 +67,9 @@ int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request 
int intel_logical_ring_reserve_space(struct drm_i915_gem_request *request);

void intel_logical_ring_stop(struct intel_engine_cs *engine);

void intel_logical_ring_cleanup(struct intel_engine_cs *engine);

int logical_render_ring_init(struct intel_engine_cs *engine);

int logical_xcs_ring_init(struct intel_engine_cs *engine);



int intel_engines_init(struct drm_device *dev);



int logical_ring_flush_all_caches(struct drm_i915_gem_request *req);

drivers/gpu/drm/i915/intel_ringbuffer.h

+0 −4
Original line number Diff line number Diff line
@@ -362,10 +362,6 @@ struct intel_engine_cs { 
	u32 (*get_cmd_length_mask)(u32 cmd_header);

};



struct intel_engine_cs *

intel_engine_setup(struct drm_i915_private *dev_priv,

		   enum intel_engine_id id);



static inline bool

intel_engine_initialized(const struct intel_engine_cs *engine)

{