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Commit 88c08710 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-fixes-2016-06-30' of git://anongit.freedesktop.org/drm-intel into drm-fixes 

here's a batch of i915 fixes for 4.7.

* tag 'drm-intel-fixes-2016-06-30' of git://anongit.freedesktop.org/drm-intel:
  drm/i915: Fix missing unlock on error in i915_ppgtt_info()
  drm/i915: Removing PCI IDs that are no longer listed as Kabylake.
  drm/i915: Add more Kabylake PCI IDs.
  drm/i915: Avoid early timeout during AUX transfers
  drm/i915/hsw: Avoid early timeout during LCPLL disable/restore
  drm/i915/lpt: Avoid early timeout during FDI PHY reset
  drm/i915/bxt: Avoid early timeout during PLL enable
  drm/i915: Refresh cached DP port register value on resume
parents 40793e85 cab10327

drivers/gpu/drm/i915/i915_debugfs.c

+2 −2
Original line number Diff line number Diff line
@@ -2365,16 +2365,16 @@ static int i915_ppgtt_info(struct seq_file *m, void *data) 
		task = get_pid_task(file->pid, PIDTYPE_PID);

		if (!task) {

			ret = -ESRCH;

			goto out_put;

			goto out_unlock;

		}

		seq_printf(m, "\nproc: %s\n", task->comm);

		put_task_struct(task);

		idr_for_each(&file_priv->context_idr, per_file_ctx,

			     (void *)(unsigned long)m);

	}

out_unlock:

	mutex_unlock(&dev->filelist_mutex);



out_put:

	intel_runtime_pm_put(dev_priv);

	mutex_unlock(&dev->struct_mutex);

drivers/gpu/drm/i915/intel_display.c

+8 −8
Original line number Diff line number Diff line
@@ -8447,7 +8447,7 @@ static void lpt_reset_fdi_mphy(struct drm_i915_private *dev_priv) 
	tmp |= FDI_MPHY_IOSFSB_RESET_CTL;

	I915_WRITE(SOUTH_CHICKEN2, tmp);



	if (wait_for_atomic_us(I915_READ(SOUTH_CHICKEN2) &

	if (wait_for_us(I915_READ(SOUTH_CHICKEN2) &

			FDI_MPHY_IOSFSB_RESET_STATUS, 100))

		DRM_ERROR("FDI mPHY reset assert timeout\n");
@@ -8455,7 +8455,7 @@ static void lpt_reset_fdi_mphy(struct drm_i915_private *dev_priv) 
	tmp &= ~FDI_MPHY_IOSFSB_RESET_CTL;

	I915_WRITE(SOUTH_CHICKEN2, tmp);



	if (wait_for_atomic_us((I915_READ(SOUTH_CHICKEN2) &

	if (wait_for_us((I915_READ(SOUTH_CHICKEN2) &

			 FDI_MPHY_IOSFSB_RESET_STATUS) == 0, 100))

		DRM_ERROR("FDI mPHY reset de-assert timeout\n");

}
@@ -9440,7 +9440,7 @@ static void hsw_disable_lcpll(struct drm_i915_private *dev_priv, 
		val |= LCPLL_CD_SOURCE_FCLK;

		I915_WRITE(LCPLL_CTL, val);



		if (wait_for_atomic_us(I915_READ(LCPLL_CTL) &

		if (wait_for_us(I915_READ(LCPLL_CTL) &

				LCPLL_CD_SOURCE_FCLK_DONE, 1))

			DRM_ERROR("Switching to FCLK failed\n");
@@ -9514,7 +9514,7 @@ static void hsw_restore_lcpll(struct drm_i915_private *dev_priv) 
		val &= ~LCPLL_CD_SOURCE_FCLK;

		I915_WRITE(LCPLL_CTL, val);



		if (wait_for_atomic_us((I915_READ(LCPLL_CTL) &

		if (wait_for_us((I915_READ(LCPLL_CTL) &

				 LCPLL_CD_SOURCE_FCLK_DONE) == 0, 1))

			DRM_ERROR("Switching back to LCPLL failed\n");

	}

drivers/gpu/drm/i915/intel_dp.c

+6 −4
Original line number Diff line number Diff line
@@ -663,7 +663,7 @@ intel_dp_aux_wait_done(struct intel_dp *intel_dp, bool has_aux_irq) 
		done = wait_event_timeout(dev_priv->gmbus_wait_queue, C,

					  msecs_to_jiffies_timeout(10));

	else

		done = wait_for_atomic(C, 10) == 0;

		done = wait_for(C, 10) == 0;

	if (!done)

		DRM_ERROR("dp aux hw did not signal timeout (has irq: %i)!\n",

			  has_aux_irq);
@@ -4899,13 +4899,15 @@ static void intel_edp_panel_vdd_sanitize(struct intel_dp *intel_dp) 


void intel_dp_encoder_reset(struct drm_encoder *encoder)

{

	struct intel_dp *intel_dp;

	struct drm_i915_private *dev_priv = to_i915(encoder->dev);

	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);



	if (!HAS_DDI(dev_priv))

		intel_dp->DP = I915_READ(intel_dp->output_reg);



	if (to_intel_encoder(encoder)->type != INTEL_OUTPUT_EDP)

		return;



	intel_dp = enc_to_intel_dp(encoder);



	pps_lock(intel_dp);



	/*

drivers/gpu/drm/i915/intel_dpll_mgr.c

+2 −2
Original line number Diff line number Diff line
@@ -1377,8 +1377,8 @@ static void bxt_ddi_pll_enable(struct drm_i915_private *dev_priv, 
	I915_WRITE(BXT_PORT_PLL_ENABLE(port), temp);

	POSTING_READ(BXT_PORT_PLL_ENABLE(port));



	if (wait_for_atomic_us((I915_READ(BXT_PORT_PLL_ENABLE(port)) &

			PORT_PLL_LOCK), 200))

	if (wait_for_us((I915_READ(BXT_PORT_PLL_ENABLE(port)) & PORT_PLL_LOCK),

			200))

		DRM_ERROR("PLL %d not locked\n", port);



	/*

include/drm/i915_pciids.h

+4 −6
Original line number Diff line number Diff line
@@ -309,6 +309,7 @@ 
	INTEL_VGA_DEVICE(0x5906, info), /* ULT GT1 */ \

	INTEL_VGA_DEVICE(0x590E, info), /* ULX GT1 */ \

	INTEL_VGA_DEVICE(0x5902, info), /* DT  GT1 */ \

	INTEL_VGA_DEVICE(0x5908, info), /* Halo GT1 */ \

	INTEL_VGA_DEVICE(0x590B, info), /* Halo GT1 */ \

	INTEL_VGA_DEVICE(0x590A, info) /* SRV GT1 */
@@ -322,15 +323,12 @@ 
	INTEL_VGA_DEVICE(0x591D, info) /* WKS GT2 */



#define INTEL_KBL_GT3_IDS(info) \

	INTEL_VGA_DEVICE(0x5923, info), /* ULT GT3 */ \

	INTEL_VGA_DEVICE(0x5926, info), /* ULT GT3 */ \

	INTEL_VGA_DEVICE(0x592B, info), /* Halo GT3 */ \

	INTEL_VGA_DEVICE(0x592A, info) /* SRV GT3 */

	INTEL_VGA_DEVICE(0x5927, info) /* ULT GT3 */



#define INTEL_KBL_GT4_IDS(info) \

	INTEL_VGA_DEVICE(0x5932, info), /* DT  GT4 */ \

	INTEL_VGA_DEVICE(0x593B, info), /* Halo GT4 */ \

	INTEL_VGA_DEVICE(0x593A, info), /* SRV GT4 */ \

	INTEL_VGA_DEVICE(0x593D, info)  /* WKS GT4 */

	INTEL_VGA_DEVICE(0x593B, info) /* Halo GT4 */



#define INTEL_KBL_IDS(info) \

	INTEL_KBL_GT1_IDS(info), \