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Commit 88a0d960 authored by José Roberto de Souza's avatar José Roberto de Souza
Browse files

drm/i915/vbt: Parse and use the new field with PSR2 TP2/3 wakeup time 



A new field with the training pattern(TP) wakeup time for PSR2 was
added to VBT, so lets use it when available otherwise it will
fallback to PSR1 wakeup time.

v2: replacing enum to numerical usec time (Jani)

BSpec: 20131

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190312195743.8829-1-jose.souza@intel.com
parent c6c30b91

drivers/gpu/drm/i915/i915_drv.h

+1 −0
Original line number Diff line number Diff line
@@ -1012,6 +1012,7 @@ struct intel_vbt_data { 
		enum psr_lines_to_wait lines_to_wait;

		int tp1_wakeup_time_us;

		int tp2_tp3_wakeup_time_us;

		int psr2_tp2_tp3_wakeup_time_us;

	} psr;



	struct {

drivers/gpu/drm/i915/intel_bios.c

+25 −0
Original line number Diff line number Diff line
@@ -760,6 +760,31 @@ parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb) 
		dev_priv->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;

		dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;

	}



	if (bdb->version >= 226) {

		u32 wakeup_time = psr_table->psr2_tp2_tp3_wakeup_time;



		wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;

		switch (wakeup_time) {

		case 0:

			wakeup_time = 500;

			break;

		case 1:

			wakeup_time = 100;

			break;

		case 3:

			wakeup_time = 50;

			break;

		default:

		case 2:

			wakeup_time = 2500;

			break;

		}

		dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time;

	} else {

		/* Reusing PSR1 wakeup time for PSR2 in older VBTs */

		dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = dev_priv->vbt.psr.tp2_tp3_wakeup_time_us;

	}

}



static void parse_dsi_backlight_ports(struct drm_i915_private *dev_priv,

drivers/gpu/drm/i915/intel_psr.c

+4 −4
Original line number Diff line number Diff line
@@ -509,12 +509,12 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp) 


	val |= EDP_PSR2_FRAME_BEFORE_SU(dev_priv->psr.sink_sync_latency + 1);



	if (dev_priv->vbt.psr.tp2_tp3_wakeup_time_us >= 0 &&

	    dev_priv->vbt.psr.tp2_tp3_wakeup_time_us <= 50)

	if (dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us >= 0 &&

	    dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us <= 50)

		val |= EDP_PSR2_TP2_TIME_50us;

	else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time_us <= 100)

	else if (dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us <= 100)

		val |= EDP_PSR2_TP2_TIME_100us;

	else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time_us <= 500)

	else if (dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us <= 500)

		val |= EDP_PSR2_TP2_TIME_500us;

	else

		val |= EDP_PSR2_TP2_TIME_2500us;

drivers/gpu/drm/i915/intel_vbt_defs.h

+3 −0
Original line number Diff line number Diff line
@@ -772,6 +772,9 @@ struct psr_table { 
	/* TP wake up time in multiple of 100 */

	u16 tp1_wakeup_time;

	u16 tp2_tp3_wakeup_time;



	/* PSR2 TP2/TP3 wakeup time for 16 panels */

	u32 psr2_tp2_tp3_wakeup_time;

} __packed;



struct bdb_psr {