Merge "ARM: dts: msm: add clocks for shima gfx smmu"

		#size-cells = <1>;

		#address-cells = <1>;

		ranges;

		qcom,regulator-names = "vdd";

		vdd-supply = <&gpu_cx_gdsc>;

		clocks = <&gcc GCC_GPU_MEMNOC_GFX_CLK>,

			<&gcc GCC_GPU_SNOC_DVM_GFX_CLK>,

			<&gpucc GPU_CC_AHB_CLK>,

			<&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>;

		clock-names = "gcc_gpu_memnoc_gfx",

			"gcc_gpu_snoc_dvm_gfx",

			"gpu_cc_ahb",

			"gpu_cc_hlos1_vote_gpu_smmu_clk";

		interconnects = <&gem_noc MASTER_GPU_TCU &mc_virt SLAVE_EBI1>;

		interrupts =	<GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH>,

				<GIC_SPI 675 IRQ_TYPE_LEVEL_HIGH>,