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Commit 8799af0d authored by Adam Thomson's avatar Adam Thomson Committed by Mark Brown
Browse files

ASoC: da7218: Remove 32KHz PLL mode from driver 



Functionality has been removed in latest silicon variants. This
patch removes the feature from the driver to align.

Signed-off-by: default avatarAdam Thomson <Adam.Thomson.Opensource@diasemi.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 29b4817d

sound/soc/codecs/da7218.c

+3 −9
Original line number Original line Diff line number Diff line
@@ -1819,7 +1819,7 @@ static int da7218_set_dai_sysclk(struct snd_soc_dai *codec_dai, 
	if (da7218->mclk_rate == freq)

	if (da7218->mclk_rate == freq)

		return 0;

		return 0;





	if (((freq < 2000000) && (freq != 32768)) || (freq > 54000000)) {

	if ((freq < 2000000) || (freq > 54000000)) {

		dev_err(codec_dai->dev, "Unsupported MCLK value %d\n",

		dev_err(codec_dai->dev, "Unsupported MCLK value %d\n",

			freq);

			freq);

		return -EINVAL;

		return -EINVAL;
@@ -1866,11 +1866,8 @@ static int da7218_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, 
	u32 freq_ref;

	u32 freq_ref;

	u64 frac_div;

	u64 frac_div;





	/* Verify 32KHz, 2MHz - 54MHz MCLK provided, and set input divider */

	/* Verify 2MHz - 54MHz MCLK provided, and set input divider */

	if (da7218->mclk_rate == 32768) {

	if (da7218->mclk_rate < 2000000) {

		indiv_bits = DA7218_PLL_INDIV_9_TO_18_MHZ;

		indiv = DA7218_PLL_INDIV_9_TO_18_MHZ_VAL;

	} else if (da7218->mclk_rate < 2000000) {

		dev_err(codec->dev, "PLL input clock %d below valid range\n",

		dev_err(codec->dev, "PLL input clock %d below valid range\n",

			da7218->mclk_rate);

			da7218->mclk_rate);

		return -EINVAL;

		return -EINVAL;
@@ -1911,9 +1908,6 @@ static int da7218_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, 
	case DA7218_SYSCLK_PLL_SRM:

	case DA7218_SYSCLK_PLL_SRM:

		pll_ctrl |= DA7218_PLL_MODE_SRM;

		pll_ctrl |= DA7218_PLL_MODE_SRM;

		break;

		break;

	case DA7218_SYSCLK_PLL_32KHZ:

		pll_ctrl |= DA7218_PLL_MODE_32KHZ;

		break;

	default:

	default:

		dev_err(codec->dev, "Invalid PLL config\n");

		dev_err(codec->dev, "Invalid PLL config\n");

		return -EINVAL;

		return -EINVAL;

sound/soc/codecs/da7218.h

+0 −2
Original line number Original line Diff line number Diff line
@@ -888,7 +888,6 @@ 
#define DA7218_PLL_MODE_BYPASS		(0x0 << 6)

#define DA7218_PLL_MODE_BYPASS		(0x0 << 6)

#define DA7218_PLL_MODE_NORMAL		(0x1 << 6)

#define DA7218_PLL_MODE_NORMAL		(0x1 << 6)

#define DA7218_PLL_MODE_SRM		(0x2 << 6)

#define DA7218_PLL_MODE_SRM		(0x2 << 6)

#define DA7218_PLL_MODE_32KHZ		(0x3 << 6)





/* DA7218_PLL_FRAC_TOP = 0x92 */

/* DA7218_PLL_FRAC_TOP = 0x92 */

#define DA7218_PLL_FBDIV_FRAC_TOP_SHIFT	0

#define DA7218_PLL_FBDIV_FRAC_TOP_SHIFT	0
@@ -1371,7 +1370,6 @@ enum da7218_sys_clk { 
	DA7218_SYSCLK_MCLK = 0,

	DA7218_SYSCLK_MCLK = 0,

	DA7218_SYSCLK_PLL,

	DA7218_SYSCLK_PLL,

	DA7218_SYSCLK_PLL_SRM,

	DA7218_SYSCLK_PLL_SRM,

	DA7218_SYSCLK_PLL_32KHZ

};

};





enum da7218_dev_id {

enum da7218_dev_id {