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Commit 86c391bd authored by Christophe Leroy's avatar Christophe Leroy Committed by Michael Ellerman
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powerpc/32: Add ioremap_wt() and ioremap_coherent() 



Other arches have ioremap_wt() to map IO areas write-through.
Implement it on PPC as well in order to avoid drivers using
__ioremap(_PAGE_WRITETHRU)

Also implement ioremap_coherent() to avoid drivers using
__ioremap(_PAGE_COHERENT)

Signed-off-by: default avatarChristophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent dfd718a2

arch/powerpc/include/asm/io.h

+9 −0
Original line number Diff line number Diff line
@@ -3,6 +3,9 @@ 
#ifdef __KERNEL__



#define ARCH_HAS_IOREMAP_WC

#ifdef CONFIG_PPC32

#define ARCH_HAS_IOREMAP_WT

#endif



/*

 * This program is free software; you can redistribute it and/or
@@ -746,6 +749,10 @@ static inline void iosync(void) 
 *

 * * ioremap_wc enables write combining

 *

 * * ioremap_wt enables write through

 *

 * * ioremap_coherent maps coherent cached memory

 *

 * * iounmap undoes such a mapping and can be hooked

 *

 * * __ioremap_at (and the pending __iounmap_at) are low level functions to
@@ -767,6 +774,8 @@ extern void __iomem *ioremap(phys_addr_t address, unsigned long size); 
extern void __iomem *ioremap_prot(phys_addr_t address, unsigned long size,

				  unsigned long flags);

extern void __iomem *ioremap_wc(phys_addr_t address, unsigned long size);

void __iomem *ioremap_wt(phys_addr_t address, unsigned long size);

void __iomem *ioremap_coherent(phys_addr_t address, unsigned long size);

#define ioremap_nocache(addr, size)	ioremap((addr), (size))

#define ioremap_uc(addr, size)		ioremap((addr), (size))

#define ioremap_cache(addr, size) \

arch/powerpc/mm/pgtable_32.c

+16 −0
Original line number Diff line number Diff line
@@ -89,6 +89,22 @@ ioremap_wc(phys_addr_t addr, unsigned long size) 
}

EXPORT_SYMBOL(ioremap_wc);



void __iomem *

ioremap_wt(phys_addr_t addr, unsigned long size)

{

	return __ioremap_caller(addr, size, _PAGE_WRITETHRU,

				__builtin_return_address(0));

}

EXPORT_SYMBOL(ioremap_wt);



void __iomem *

ioremap_coherent(phys_addr_t addr, unsigned long size)

{

	return __ioremap_caller(addr, size, _PAGE_COHERENT,

				__builtin_return_address(0));

}

EXPORT_SYMBOL(ioremap_coherent);



void __iomem *

ioremap_prot(phys_addr_t addr, unsigned long size, unsigned long flags)

{

arch/powerpc/mm/pgtable_64.c

+10 −0
Original line number Diff line number Diff line
@@ -222,6 +222,16 @@ void __iomem * ioremap_wc(phys_addr_t addr, unsigned long size) 
	return __ioremap_caller(addr, size, flags, caller);

}



void __iomem *ioremap_coherent(phys_addr_t addr, unsigned long size)

{

	unsigned long flags = pgprot_val(pgprot_cached(__pgprot(0)));

	void *caller = __builtin_return_address(0);



	if (ppc_md.ioremap)

		return ppc_md.ioremap(addr, size, flags, caller);

	return __ioremap_caller(addr, size, flags, caller);

}



void __iomem * ioremap_prot(phys_addr_t addr, unsigned long size,

			     unsigned long flags)

{