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Commit 86b3df8a authored by Thyagarajan Venkatanarayanan's avatar Thyagarajan Venkatanarayanan
Browse files

ARM: dts: msm: add fastrpc and cdsp device nodes for lahaina 

Add fastrpc context banks, memory regions, cdsp device node and
ION heap 22 info for lahaina.

Change-Id: Iab10572bf13537a350880ee2848b53cfb5a65640
parent e0e89627

qcom/lahaina-ion.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -9,6 +9,12 @@ 
			qcom,ion-heap-type = "SYSTEM";

		};



		adsp_heap: qcom,ion-heap@22 {

			reg = <22>;

			memory-region = <&sdsp_mem>;

			qcom,ion-heap-type = "DMA";

		};



		system_secure_heap: qcom,ion-heap@9 {

			reg = <9>;

			qcom,ion-heap-type = "SYSTEM_SECURE";

qcom/lahaina.dtsi

+182 −0
Original line number Diff line number Diff line
@@ -299,6 +299,22 @@ 
			reg = <0x0 0x98900000 0x0 0x1400000>;

		};



		adsp_mem: adsp_region {

			compatible = "shared-dma-pool";

			alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;

			reusable;

			alignment = <0x0 0x400000>;

			size = <0x0 0xC00000>;

		};



		sdsp_mem: sdsp_region {

			compatible = "shared-dma-pool";

			alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;

			reusable;

			alignment = <0x0 0x400000>;

			size = <0x0 0x800000>;

		};



		cdsp_secure_heap: cdsp_secure_heap@9b200000 {

			reg = <0x0 0x9b200000 0x0 0x4600000>;

		};
@@ -734,6 +750,172 @@ 
				  <WAKE_TCS    1>,

				  <CONTROL_TCS 0>;

	};



	qcom,msm-cdsp-loader {

		compatible = "qcom,cdsp-loader";

		qcom,proc-img-to-load = "cdsp";

	};



	qcom,msm-adsprpc-mem {

		compatible = "qcom,msm-adsprpc-mem-region";

		memory-region = <&adsp_mem>;

		restrict-access;

	};



	msm_fastrpc: qcom,msm_fastrpc {

		compatible = "qcom,msm-fastrpc-compute";

		qcom,adsp-remoteheap-vmid = <22 37>;

		qcom,fastrpc-adsp-audio-pdr;

		qcom,fastrpc-adsp-sensors-pdr;

		qcom,rpc-latency-us = <235>;



		qcom,msm_fastrpc_compute_cb1 {

			compatible = "qcom,msm-fastrpc-compute-cb";

			label = "cdsprpc-smd";

			iommus = <&apps_smmu 0x2161 0x0400>,

					 <&apps_smmu 0x1181 0x0420>;

			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;

			qcom,iommu-faults = "stall-disable";

			dma-coherent;

		};



		qcom,msm_fastrpc_compute_cb2 {

			compatible = "qcom,msm-fastrpc-compute-cb";

			label = "cdsprpc-smd";

			iommus = <&apps_smmu 0x2142 0x04A0>,

					 <&apps_smmu 0x1102 0x04A0>;

			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;

			qcom,iommu-faults = "stall-disable";

			dma-coherent;

		};



		qcom,msm_fastrpc_compute_cb3 {

			compatible = "qcom,msm-fastrpc-compute-cb";

			label = "cdsprpc-smd";

			iommus = <&apps_smmu 0x2143 0x14A0>,

					 <&apps_smmu 0x1103 0x04E0>;

			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;

			qcom,iommu-faults = "stall-disable";

			dma-coherent;

		};



		qcom,msm_fastrpc_compute_cb4 {

			compatible = "qcom,msm-fastrpc-compute-cb";

			label = "cdsprpc-smd";

			iommus = <&apps_smmu 0x0144 0x2420>,

					 <&apps_smmu 0x1184 0x0460>;

			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;

			qcom,iommu-faults = "stall-disable";

			dma-coherent;

		};



		qcom,msm_fastrpc_compute_cb5 {

			compatible = "qcom,msm-fastrpc-compute-cb";

			label = "cdsprpc-smd";

			iommus = <&apps_smmu 0x2165 0x0480>,

					 <&apps_smmu 0x1105 0x04E0>;

			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;

			qcom,iommu-faults = "stall-disable";

			dma-coherent;

		};



		qcom,msm_fastrpc_compute_cb6 {

			compatible = "qcom,msm-fastrpc-compute-cb";

			label = "cdsprpc-smd";

			iommus = <&apps_smmu 0x0126 0x34C0>,

					 <&apps_smmu 0x1186 0x2400>;

			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;

			qcom,iommu-faults = "stall-disable";

			dma-coherent;

		};



		qcom,msm_fastrpc_compute_cb7 {

			compatible = "qcom,msm-fastrpc-compute-cb";

			label = "cdsprpc-smd";

			iommus = <&apps_smmu 0x2147 0x0420>,

					 <&apps_smmu 0x1187 0x2420>;

			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;

			qcom,iommu-faults = "stall-disable";

			dma-coherent;

		};



		qcom,msm_fastrpc_compute_cb8 {

			compatible = "qcom,msm-fastrpc-compute-cb";

			label = "cdsprpc-smd";

			iommus = <&apps_smmu 0x0148 0x3420>,

					 <&apps_smmu 0x1108 0x24A0>;

			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;

			qcom,iommu-faults = "stall-disable";

			dma-coherent;

		};



		qcom,msm_fastrpc_compute_cb9 {

			compatible = "qcom,msm-fastrpc-compute-cb";

			label = "cdsprpc-smd";

			qcom,secure-context-bank;

			iommus = <&apps_smmu 0x0149 0x34A0>,

					 <&apps_smmu 0x1109 0x04E0>;

			qcom,iommu-dma-addr-pool = <0x60000000 0x78000000>;

			qcom,iommu-faults = "stall-disable";

			qcom,iommu-vmid = <0xA>;	/* VMID_CP_PIXEL */

			dma-coherent;

		};



		qcom,msm_fastrpc_compute_cb10 {

			compatible = "qcom,msm-fastrpc-compute-cb";

			label = "adsprpc-smd";

			iommus = <&apps_smmu 0x1803 0x0>;

			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;

			qcom,iommu-faults = "stall-disable";

			dma-coherent;

		};



		qcom,msm_fastrpc_compute_cb11 {

			compatible = "qcom,msm-fastrpc-compute-cb";

			label = "adsprpc-smd";

			iommus = <&apps_smmu 0x1804 0x0>;

			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;

			qcom,iommu-faults = "stall-disable";

			dma-coherent;

		};



		qcom,msm_fastrpc_compute_cb12 {

			compatible = "qcom,msm-fastrpc-compute-cb";

			label = "adsprpc-smd";

			iommus = <&apps_smmu 0x1805 0x0>;

			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;

			qcom,iommu-faults = "stall-disable";

			dma-coherent;

		};



		qcom,msm_fastrpc_compute_cb13 {

			compatible = "qcom,msm-fastrpc-compute-cb";

			label = "sdsprpc-smd";

			iommus = <&apps_smmu 0x0541 0x0>;

			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;

			qcom,iommu-faults = "stall-disable";

			dma-coherent;

		};



		qcom,msm_fastrpc_compute_cb14 {

			compatible = "qcom,msm-fastrpc-compute-cb";

			label = "sdsprpc-smd";

			iommus = <&apps_smmu 0x0542 0x0>;

			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;

			qcom,iommu-faults = "stall-disable";

			dma-coherent;

		};



		qcom,msm_fastrpc_compute_cb15 {

			compatible = "qcom,msm-fastrpc-compute-cb";

			label = "sdsprpc-smd";

			iommus = <&apps_smmu 0x0543 0x0>;

			qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;

			qcom,iommu-faults = "stall-disable";

			shared-cb = <4>;

			dma-coherent;

		};

	};

};



#include "lahaina-pinctrl.dtsi"