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Commit 86505fc0 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc 

Pull sparc updates from David Miller:

 1) Double spin lock bug in sunhv serial driver, from Dan Carpenter.

 2) Use correct RSS estimate when determining whether to grow the huge
    TSB or not, from Mike Kravetz.

 3) Don't use full three level page tables for hugepages, PMD level is
    sufficient.  From Nitin Gupta.

 4) Mask out extraneous bits from TSB_TAG_ACCESS register, we only want
    the address bits.

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc:
  sparc64: Trim page tables for 8M hugepages
  sparc64 mm: Fix base TSB sizing when hugetlb pages are used
  sparc: serial: sunhv: fix a double lock bug
  sparc32: off by ones in BUG_ON()
  sparc: Don't leak context bits into thread->fault_address
parents 9d3bc3d4 7bc3777c

arch/sparc/include/asm/hugetlb.h

+4 −8
Original line number Diff line number Diff line
@@ -31,14 +31,6 @@ static inline int prepare_hugepage_range(struct file *file, 
	return 0;

}



static inline void hugetlb_free_pgd_range(struct mmu_gather *tlb,

					  unsigned long addr, unsigned long end,

					  unsigned long floor,

					  unsigned long ceiling)

{

	free_pgd_range(tlb, addr, end, floor, ceiling);

}



static inline void huge_ptep_clear_flush(struct vm_area_struct *vma,

					 unsigned long addr, pte_t *ptep)

{
@@ -82,4 +74,8 @@ static inline void arch_clear_hugepage_flags(struct page *page) 
{

}



void hugetlb_free_pgd_range(struct mmu_gather *tlb, unsigned long addr,

			    unsigned long end, unsigned long floor,

			    unsigned long ceiling);



#endif /* _ASM_SPARC64_HUGETLB_H */

arch/sparc/include/asm/mmu_64.h

+2 −1
Original line number Diff line number Diff line
@@ -92,7 +92,8 @@ struct tsb_config { 
typedef struct {

	spinlock_t		lock;

	unsigned long		sparc64_ctx_val;

	unsigned long		huge_pte_count;

	unsigned long		hugetlb_pte_count;

	unsigned long		thp_pte_count;

	struct tsb_config	tsb_block[MM_NUM_TSBS];

	struct hv_tsb_descr	tsb_descr[MM_NUM_TSBS];

} mm_context_t;

arch/sparc/include/asm/pgtable_64.h

+6 −1
Original line number Diff line number Diff line
@@ -395,7 +395,7 @@ static inline unsigned long __pte_huge_mask(void) 


static inline pte_t pte_mkhuge(pte_t pte)

{

	return __pte(pte_val(pte) | __pte_huge_mask());

	return __pte(pte_val(pte) | _PAGE_PMD_HUGE | __pte_huge_mask());

}



static inline bool is_hugetlb_pte(pte_t pte)
@@ -403,6 +403,11 @@ static inline bool is_hugetlb_pte(pte_t pte) 
	return !!(pte_val(pte) & __pte_huge_mask());

}



static inline bool is_hugetlb_pmd(pmd_t pmd)

{

	return !!(pmd_val(pmd) & _PAGE_PMD_HUGE);

}



#ifdef CONFIG_TRANSPARENT_HUGEPAGE

static inline pmd_t pmd_mkhuge(pmd_t pmd)

{

arch/sparc/include/asm/tsb.h

+1 −1
Original line number Diff line number Diff line
@@ -203,7 +203,7 @@ extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end; 
	 * We have to propagate the 4MB bit of the virtual address

	 * because we are fabricating 8MB pages using 4MB hw pages.

	 */

#ifdef CONFIG_TRANSPARENT_HUGEPAGE

#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)

#define USER_PGTABLE_CHECK_PMD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, PTE_LABEL) \

	brz,pn		REG1, FAIL_LABEL;		\

	 sethi		%uhi(_PAGE_PMD_HUGE), REG2;	\

arch/sparc/kernel/dtlb_prot.S

+2 −2
Original line number Diff line number Diff line
@@ -25,13 +25,13 @@ 


/* PROT ** ICACHE line 2: More real fault processing */

	ldxa		[%g4] ASI_DMMU, %g5		! Put tagaccess in %g5

	srlx		%g5, PAGE_SHIFT, %g5

	sllx		%g5, PAGE_SHIFT, %g5		! Clear context ID bits

	bgu,pn		%xcc, winfix_trampoline		! Yes, perform winfixup

	 mov		FAULT_CODE_DTLB | FAULT_CODE_WRITE, %g4

	ba,pt		%xcc, sparc64_realfault_common	! Nope, normal fault

	 nop

	nop

	nop

	nop



/* PROT ** ICACHE line 3: Unused...	*/

	nop