Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 85ffdd28 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev

* 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev:
  [libata] pata_pcmcia: Add additional id string (corsair, 1GB)
  libata: prevent devices with blank model names from being DMA blacklisted
  ata_piix: SATA 2port controller port map fix
  pata_cs5536: ATA driver for Geode companion chip
  libata: add ST9160821AS / 3.CCD to NCQ blacklist
  libata: fix revalidation issuing after configuration commands
  [libata] sata_nv: add SW NCQ support for MCP51/MCP55/MCP61
  [libata] pata_sil680: Add MMIO support
parents 43d39ae0 77ec15cc
Loading
Loading
Loading
Loading
+9 −0
Original line number Diff line number Diff line
@@ -272,6 +272,15 @@ config PATA_CS5535

	  If unsure, say N.

config PATA_CS5536
	tristate "CS5536 PATA support (Experimental)"
	depends on PCI && X86 && !X86_64 && EXPERIMENTAL
	help
	  This option enables support for the AMD CS5536
	  companion chip used with the Geode LX processor family.

	  If unsure, say N.

config PATA_CYPRESS
	tristate "Cypress CY82C693 PATA support (Very Experimental)"
	depends on PCI && EXPERIMENTAL
+1 −0
Original line number Diff line number Diff line
@@ -28,6 +28,7 @@ obj-$(CONFIG_PATA_CMD64X) += pata_cmd64x.o
obj-$(CONFIG_PATA_CS5520)	+= pata_cs5520.o
obj-$(CONFIG_PATA_CS5530)	+= pata_cs5530.o
obj-$(CONFIG_PATA_CS5535)	+= pata_cs5535.o
obj-$(CONFIG_PATA_CS5536)	+= pata_cs5536.o
obj-$(CONFIG_PATA_CYPRESS)	+= pata_cypress.o
obj-$(CONFIG_PATA_EFAR)		+= pata_efar.o
obj-$(CONFIG_PATA_HPT366)	+= pata_hpt366.o
+30 −5
Original line number Diff line number Diff line
@@ -130,6 +130,7 @@ enum {
	ich8_sata_ahci		= 9,
	piix_pata_mwdma		= 10,	/* PIIX3 MWDMA only */
	tolapai_sata_ahci	= 11,
	ich9_2port_sata		= 12,

	/* constants for mapping table */
	P0			= 0,  /* port 0 */
@@ -238,19 +239,19 @@ static const struct pci_device_id piix_pci_tbl[] = {
	/* SATA Controller 1 IDE (ICH8) */
	{ 0x8086, 0x2820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
	/* SATA Controller 2 IDE (ICH8) */
	{ 0x8086, 0x2825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
	{ 0x8086, 0x2825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich9_2port_sata },
	/* Mobile SATA Controller IDE (ICH8M) */
	{ 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
	/* SATA Controller IDE (ICH9) */
	{ 0x8086, 0x2920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
	/* SATA Controller IDE (ICH9) */
	{ 0x8086, 0x2921, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
	{ 0x8086, 0x2921, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich9_2port_sata },
	/* SATA Controller IDE (ICH9) */
	{ 0x8086, 0x2926, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
	{ 0x8086, 0x2926, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich9_2port_sata },
	/* SATA Controller IDE (ICH9M) */
	{ 0x8086, 0x2928, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
	{ 0x8086, 0x2928, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich9_2port_sata },
	/* SATA Controller IDE (ICH9M) */
	{ 0x8086, 0x292d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
	{ 0x8086, 0x292d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich9_2port_sata },
	/* SATA Controller IDE (ICH9M) */
	{ 0x8086, 0x292e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
	/* SATA Controller IDE (Tolapai) */
@@ -448,6 +449,18 @@ static const struct piix_map_db tolapai_map_db = {
	},
};

static const struct piix_map_db ich9_2port_map_db = {
	.mask = 0x3,
	.port_enable = 0x3,
	.map = {
		/* PM   PS   SM   SS       MAP */
		{  P0,  NA,  P1,  NA }, /* 00b */
		{  RV,  RV,  RV,  RV }, /* 01b */
		{  RV,  RV,  RV,  RV }, /* 10b */
		{  RV,  RV,  RV,  RV },
	},
};

static const struct piix_map_db *piix_map_db_table[] = {
	[ich5_sata]		= &ich5_map_db,
	[ich6_sata]		= &ich6_map_db,
@@ -455,6 +468,7 @@ static const struct piix_map_db *piix_map_db_table[] = {
	[ich6m_sata_ahci]	= &ich6m_map_db,
	[ich8_sata_ahci]	= &ich8_map_db,
	[tolapai_sata_ahci]	= &tolapai_map_db,
	[ich9_2port_sata]	= &ich9_2port_map_db,
};

static struct ata_port_info piix_port_info[] = {
@@ -570,6 +584,17 @@ static struct ata_port_info piix_port_info[] = {
		.udma_mask	= ATA_UDMA6,
		.port_ops	= &piix_sata_ops,
	},

	[ich9_2port_sata] =
	{
		.sht		= &piix_sht,
		.flags		= PIIX_SATA_FLAGS | PIIX_FLAG_SCR |
				  PIIX_FLAG_AHCI,
		.pio_mask	= 0x1f,	/* pio0-4 */
		.mwdma_mask	= 0x07, /* mwdma0-2 */
		.udma_mask	= ATA_UDMA6,
		.port_ops	= &piix_sata_ops,
	},
};

static struct pci_bits piix_enable_bits[] = {
+8 −1
Original line number Diff line number Diff line
@@ -3984,6 +3984,7 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {
	{ "ST9120822AS",	"3.CLF",	ATA_HORKAGE_NONCQ, },
	{ "ST9160821AS",	"3.CLF",	ATA_HORKAGE_NONCQ, },
	{ "ST9160821AS",	"3.ALD",	ATA_HORKAGE_NONCQ, },
	{ "ST9160821AS",	"3.CCD",	ATA_HORKAGE_NONCQ, },
	{ "ST3160812AS",	"3.ADJ",	ATA_HORKAGE_NONCQ, },
	{ "ST980813AS",		"3.ADB",	ATA_HORKAGE_NONCQ, },
	{ "SAMSUNG HD401LJ",	"ZZ100-15",	ATA_HORKAGE_NONCQ, },
@@ -4013,8 +4014,14 @@ int strn_pattern_cmp(const char *patt, const char *name, int wildchar)
	p = strchr(patt, wildchar);
	if (p && ((*(p + 1)) == 0))
		len = p - patt;
	else
	else {
		len = strlen(name);
		if (!len) {
			if (!*patt)
				return 0;
			return -1;
		}
	}

	return strncmp(patt, name, len);
}
+3 −2
Original line number Diff line number Diff line
@@ -1363,6 +1363,7 @@ static unsigned int ata_scsi_rw_xlat(struct ata_queued_cmd *qc)
static void ata_scsi_qc_complete(struct ata_queued_cmd *qc)
{
	struct ata_port *ap = qc->ap;
	struct ata_eh_info *ehi = &qc->dev->link->eh_info;
	struct scsi_cmnd *cmd = qc->scsicmd;
	u8 *cdb = cmd->cmnd;
 	int need_sense = (qc->err_mask != 0);
@@ -1376,14 +1377,14 @@ static void ata_scsi_qc_complete(struct ata_queued_cmd *qc)
		case ATA_CMD_SET_FEATURES:
			if ((qc->tf.feature == SETFEATURES_WC_ON) ||
			    (qc->tf.feature == SETFEATURES_WC_OFF)) {
				ap->link.eh_info.action |= ATA_EH_REVALIDATE;
				ehi->action |= ATA_EH_REVALIDATE;
				ata_port_schedule_eh(ap);
			}
			break;

		case ATA_CMD_INIT_DEV_PARAMS: /* CHS translation changed */
		case ATA_CMD_SET_MULTI: /* multi_count changed */
			ap->link.eh_info.action |= ATA_EH_REVALIDATE;
			ehi->action |= ATA_EH_REVALIDATE;
			ata_port_schedule_eh(ap);
			break;
		}
Loading