Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 8571890e authored by Jeremy Linton's avatar Jeremy Linton Committed by Catalin Marinas
Browse files

arm64: Add support for ACPI based firmware tables 



The /sys cache entries should support ACPI/PPTT generated cache
topology information.  For arm64, if ACPI is enabled, determine
the max number of cache levels and populate them using the PPTT
table if one is available.

Tested-by: default avatarArd Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: default avatarVijaya Kumar K <vkilari@codeaurora.org>
Tested-by: default avatarXiongfeng Wang <wangxiongfeng2@huawei.com>
Tested-by: default avatarTomasz Nowicki <Tomasz.Nowicki@cavium.com>
Reviewed-by: default avatarSudeep Holla <sudeep.holla@arm.com>
Acked-by: default avatarArd Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: default avatarJeremy Linton <jeremy.linton@arm.com>
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 582b468b

arch/arm64/kernel/cacheinfo.c

+10 −5
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ 
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.

 */



#include <linux/acpi.h>

#include <linux/cacheinfo.h>

#include <linux/of.h>
@@ -46,7 +47,7 @@ static void ci_leaf_init(struct cacheinfo *this_leaf, 


static int __init_cache_level(unsigned int cpu)

{

	unsigned int ctype, level, leaves, of_level;

	unsigned int ctype, level, leaves, fw_level;

	struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);



	for (level = 1, leaves = 0; level <= MAX_CACHE_LEVEL; level++) {
@@ -59,15 +60,19 @@ static int __init_cache_level(unsigned int cpu) 
		leaves += (ctype == CACHE_TYPE_SEPARATE) ? 2 : 1;

	}



	of_level = of_find_last_cache_level(cpu);

	if (level < of_level) {

	if (acpi_disabled)

		fw_level = of_find_last_cache_level(cpu);

	else

		fw_level = acpi_find_last_cache_level(cpu);



	if (level < fw_level) {

		/*

		 * some external caches not specified in CLIDR_EL1

		 * the information may be available in the device tree

		 * only unified external caches are considered here

		 */

		leaves += (of_level - level);

		level = of_level;

		leaves += (fw_level - level);

		level = fw_level;

	}



	this_cpu_ci->num_levels = level;