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Commit 8563188e authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-next-4.16' of git://people.freedesktop.org/~agd5f/linux into drm-next 

A few fixes for 4.16:
- Cleanup the the remains of ttm io_mem_pfn
- A couple dpm quirks for SI
- Add Chunming as another amdgpu maintainer
- A few more huge page fixes
- A few other misc fixes

* 'drm-next-4.16' of git://people.freedesktop.org/~agd5f/linux:
  drm/amd/pp: Implement get_max_high_clocks for CI/VI
  MAINTAINERS: add David (Chunming) Zhou as additional amdgpu maintainer
  drm/amdgpu: fix 64bit BAR detection
  drm/amdgpu: optimize moved handling only when vm_debug is inactive
  drm/amdgpu: simplify huge page handling
  drm/amdgpu: update VM PDs after the PTs
  drm/amdgpu: minor optimize VM moved handling v2
  drm/amdgpu: loosen the criteria for huge pages a bit
  drm/amd/powerplay: set pp_num_states as 0 on error situation
  drm/ttm: specify DMA_ATTR_NO_WARN for huge page pools
  drm/ttm: remove ttm_bo_default_io_mem_pfn
  staging: remove the default io_mem_pfn set
  drm/amd/powerplay: fix memory leakage when reload (v2)
  drm/amdgpu/gfx9: only init the apertures used by KGD (v2)
  drm/amdgpu: add atpx quirk handling (v2)
  drm/amdgpu: Add dpm quirk for Jet PRO (v2)
  drm/radeon: Add dpm quirk for Jet PRO (v2)
parents 9be712ef ad8cec7d

MAINTAINERS

+1 −0
Original line number Diff line number Diff line
@@ -11382,6 +11382,7 @@ F: drivers/net/wireless/quantenna 
RADEON and AMDGPU DRM DRIVERS

M:	Alex Deucher <alexander.deucher@amd.com>

M:	Christian König <christian.koenig@amd.com>

M:	David (ChunMing) Zhou <David1.Zhou@amd.com>

L:	amd-gfx@lists.freedesktop.org

T:	git git://people.freedesktop.org/~agd5f/linux

S:	Supported

drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c

+50 −7
Original line number Diff line number Diff line
@@ -14,6 +14,16 @@ 


#include "amd_acpi.h"



#define AMDGPU_PX_QUIRK_FORCE_ATPX  (1 << 0)



struct amdgpu_px_quirk {

	u32 chip_vendor;

	u32 chip_device;

	u32 subsys_vendor;

	u32 subsys_device;

	u32 px_quirk_flags;

};



struct amdgpu_atpx_functions {

	bool px_params;

	bool power_cntl;
@@ -35,6 +45,7 @@ struct amdgpu_atpx { 
static struct amdgpu_atpx_priv {

	bool atpx_detected;

	bool bridge_pm_usable;

	unsigned int quirks;

	/* handle for device - and atpx */

	acpi_handle dhandle;

	acpi_handle other_handle;
@@ -205,6 +216,11 @@ static int amdgpu_atpx_validate(struct amdgpu_atpx *atpx) 


	atpx->is_hybrid = false;

	if (valid_bits & ATPX_MS_HYBRID_GFX_SUPPORTED) {

		if (amdgpu_atpx_priv.quirks & AMDGPU_PX_QUIRK_FORCE_ATPX) {

			printk("ATPX Hybrid Graphics, forcing to ATPX\n");

			atpx->functions.power_cntl = true;

			atpx->is_hybrid = false;

		} else {

			printk("ATPX Hybrid Graphics\n");

			/*

			 * Disable legacy PM methods only when pcie port PM is usable,
@@ -213,6 +229,7 @@ static int amdgpu_atpx_validate(struct amdgpu_atpx *atpx) 
			atpx->functions.power_cntl = !amdgpu_atpx_priv.bridge_pm_usable;

			atpx->is_hybrid = true;

		}

	}



	atpx->dgpu_req_power_for_displays = false;

	if (valid_bits & ATPX_DGPU_REQ_POWER_FOR_DISPLAYS)
@@ -547,6 +564,30 @@ static const struct vga_switcheroo_handler amdgpu_atpx_handler = { 
	.get_client_id = amdgpu_atpx_get_client_id,

};



static const struct amdgpu_px_quirk amdgpu_px_quirk_list[] = {

	/* HG _PR3 doesn't seem to work on this A+A weston board */

	{ 0x1002, 0x6900, 0x1002, 0x0124, AMDGPU_PX_QUIRK_FORCE_ATPX },

	{ 0x1002, 0x6900, 0x1028, 0x0812, AMDGPU_PX_QUIRK_FORCE_ATPX },

	{ 0, 0, 0, 0, 0 },

};



static void amdgpu_atpx_get_quirks(struct pci_dev *pdev)

{

	const struct amdgpu_px_quirk *p = amdgpu_px_quirk_list;



	/* Apply PX quirks */

	while (p && p->chip_device != 0) {

		if (pdev->vendor == p->chip_vendor &&

		    pdev->device == p->chip_device &&

		    pdev->subsystem_vendor == p->subsys_vendor &&

		    pdev->subsystem_device == p->subsys_device) {

			amdgpu_atpx_priv.quirks |= p->px_quirk_flags;

			break;

		}

		++p;

	}

}



/**

 * amdgpu_atpx_detect - detect whether we have PX

 *
@@ -570,6 +611,7 @@ static bool amdgpu_atpx_detect(void) 


		parent_pdev = pci_upstream_bridge(pdev);

		d3_supported |= parent_pdev && parent_pdev->bridge_d3;

		amdgpu_atpx_get_quirks(pdev);

	}



	while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_OTHER << 8, pdev)) != NULL) {
@@ -579,6 +621,7 @@ static bool amdgpu_atpx_detect(void) 


		parent_pdev = pci_upstream_bridge(pdev);

		d3_supported |= parent_pdev && parent_pdev->bridge_d3;

		amdgpu_atpx_get_quirks(pdev);

	}



	if (has_atpx && vga_count == 2) {

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

+4 −4
Original line number Diff line number Diff line
@@ -778,10 +778,6 @@ static int amdgpu_bo_vm_update_pte(struct amdgpu_cs_parser *p) 
	struct amdgpu_bo *bo;

	int i, r;



	r = amdgpu_vm_update_directories(adev, vm);

	if (r)

		return r;



	r = amdgpu_vm_clear_freed(adev, vm, NULL);

	if (r)

		return r;
@@ -839,6 +835,10 @@ static int amdgpu_bo_vm_update_pte(struct amdgpu_cs_parser *p) 
	if (r)

		return r;



	r = amdgpu_vm_update_directories(adev, vm);

	if (r)

		return r;



	r = amdgpu_sync_fence(adev, &p->job->sync, vm->last_update, false);

	if (r)

		return r;

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+1 −1
Original line number Diff line number Diff line
@@ -626,7 +626,7 @@ int amdgpu_device_resize_fb_bar(struct amdgpu_device *adev) 
		root = root->parent;



	pci_bus_for_each_resource(root, res, i) {

		if (res && res->flags & IORESOURCE_MEM_64 &&

		if (res && res->flags & (IORESOURCE_MEM | IORESOURCE_MEM_64) &&

		    res->start > 0x100000000ull)

			break;

	}

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

+4 −4
Original line number Diff line number Diff line
@@ -518,10 +518,6 @@ static void amdgpu_gem_va_update_vm(struct amdgpu_device *adev, 
	if (!amdgpu_vm_ready(vm))

		return;



	r = amdgpu_vm_update_directories(adev, vm);

	if (r)

		goto error;



	r = amdgpu_vm_clear_freed(adev, vm, NULL);

	if (r)

		goto error;
@@ -530,6 +526,10 @@ static void amdgpu_gem_va_update_vm(struct amdgpu_device *adev, 
	    operation == AMDGPU_VA_OP_REPLACE)

		r = amdgpu_vm_bo_update(adev, bo_va, false);



	r = amdgpu_vm_update_directories(adev, vm);

	if (r)

		goto error;



error:

	if (r && r != -ERESTARTSYS)

		DRM_ERROR("Couldn't update BO_VA (%d)\n", r);