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Commit 8550bf50 authored by Guru Das Srinagesh's avatar Guru Das Srinagesh
Browse files

dt-bindings: pwm-qti-lpg: Update reg definition 

Commit f6ea1a19 ("ARM: dts: msm: add PMIC devices for Lahaina")
specifies the #address-cells and #size-cells of peripheral devices under
PMIC device nodes on the SPMI bus as 1 and 0 respectively. This requires
that the reg property specification of all child nodes of the PMIC
devices be updated.

Update pwm-qti-lpg bindings accordingly. Also add missing required
property to example.

Change-Id: I0b0fc8fdaa58f03904cb82237d7ed56e37512aa1
parent 9bb8e1e5

bindings/pwm/pwm-qti-lpg.txt

+4 −3
Original line number Diff line number Diff line
@@ -10,7 +10,7 @@ device module in Qualcomm Technologies, Inc. PMIC chips. 


- reg:

	Usage: required

	Value type: <prop-encoded-array>

	Value type: <u32>

	Definition: Register base for LPG and LUT modules.



- reg-names:
@@ -175,7 +175,7 @@ Example when LUT pattern is stored in a LUT module: 


	pm8150l_lpg: lpg@b100 {

		compatible = "qcom,pwm-lpg";

		reg = <0xb100 0x600>, <0xb000 0x100>;

		reg = <0xb100>, <0xb000>;

		reg-names = "lpg-base", "lut-base";

		qcom,num-lpg-channels = <6>;

		#pwm-cells = <2>;
@@ -217,8 +217,9 @@ Example when LUT pattern is stored in a SDAM module: 


	pmi632_lpg: lpg@b100 {

		compatible = "qcom,pwm-lpg";

		reg = <0xb100 0x600>;

		reg = <0xb100>;

		reg-names = "lpg-base";

		qcom,num-lpg-channels = <3>;

		#pwm-cells = <2>;

		nvmem-names = "ppg_sdam";

		nvmem = <&sdam7>;