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Commit 851e8c7a authored by Lakshit Tyagi's avatar Lakshit Tyagi Committed by Gerrit - the friendly Code Review server
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STMMAC: msm: STMMAC BU on SA8155 LV 



Add dll and io macro configs for SA8155 LV.

Change-Id: Idafdf3e53fff86b7580cca7181bab432a17d2aa6
Acked-by: default avatarSuraj Jaiswal <jsuraj@codeaurora.org>
Acked-by: default avatarNagarjuna Chaganti <nchagant@qti.qualcomm.com>
Signed-off-by: default avatarLakshit Tyagi <ltyagi@codeaurora.org>
parent 9bef368b

drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c

+50 −21
Original line number Diff line number Diff line
@@ -150,7 +150,8 @@ static int ethqos_dll_configure(struct qcom_ethqos *ethqos) 
	int retry = 1000;



	/* Set CDR_EN */

	if (ethqos->emac_ver == EMAC_HW_v2_3_2_RG)

	if (ethqos->emac_ver == EMAC_HW_v2_3_2_RG ||

	    ethqos->emac_ver == EMAC_HW_v2_1_2)

		rgmii_updatel(ethqos, SDCC_DLL_CONFIG_CDR_EN,

			      0, SDCC_HC_REG_DLL_CONFIG);

	else
@@ -169,7 +170,8 @@ static int ethqos_dll_configure(struct qcom_ethqos *ethqos) 
	rgmii_updatel(ethqos, SDCC_DLL_CONFIG_DLL_EN,

		      SDCC_DLL_CONFIG_DLL_EN, SDCC_HC_REG_DLL_CONFIG);



	if (ethqos->emac_ver != EMAC_HW_v2_3_2_RG) {

	if (ethqos->emac_ver != EMAC_HW_v2_3_2_RG &&

	    ethqos->emac_ver != EMAC_HW_v2_1_2) {

		rgmii_updatel(ethqos, SDCC_DLL_MCLK_GATING_EN,

			      0, SDCC_HC_REG_DLL_CONFIG);
@@ -209,7 +211,8 @@ static int ethqos_dll_configure(struct qcom_ethqos *ethqos) 
	rgmii_updatel(ethqos, SDCC_DLL_CONFIG2_DDR_CAL_EN,

		      SDCC_DLL_CONFIG2_DDR_CAL_EN, SDCC_HC_REG_DLL_CONFIG2);



	if (ethqos->emac_ver != EMAC_HW_v2_3_2_RG) {

	if (ethqos->emac_ver != EMAC_HW_v2_3_2_RG &&

	    ethqos->emac_ver != EMAC_HW_v2_1_2) {

		rgmii_updatel(ethqos, SDCC_DLL_CONFIG2_DLL_CLOCK_DIS,

			      0, SDCC_HC_REG_DLL_CONFIG2);
@@ -248,6 +251,7 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos) 
			      RGMII_IO_MACRO_CONFIG);

		rgmii_updatel(ethqos, RGMII_CONFIG_PROG_SWAP,

			      RGMII_CONFIG_PROG_SWAP, RGMII_IO_MACRO_CONFIG);

		if (ethqos->emac_ver != EMAC_HW_v2_1_2)

			rgmii_updatel(ethqos, RGMII_CONFIG2_DATA_DIVIDE_CLK_SEL,

				      0, RGMII_IO_MACRO_CONFIG2);

		rgmii_updatel(ethqos, RGMII_CONFIG2_TX_CLK_PHASE_SHIFT_EN,
@@ -263,13 +267,17 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos) 
		if (ethqos->emac_ver == EMAC_HW_v2_3_2_RG)

			rgmii_updatel(ethqos, SDCC_DDR_CONFIG_PRG_RCLK_DLY,

				      69, SDCC_HC_REG_DDR_CONFIG);

		else if (ethqos->emac_ver == EMAC_HW_v2_1_2)

			rgmii_updatel(ethqos, SDCC_DDR_CONFIG_PRG_RCLK_DLY,

				      52, SDCC_HC_REG_DDR_CONFIG);

		else

			rgmii_updatel(ethqos, SDCC_DDR_CONFIG_PRG_RCLK_DLY,

				      57, SDCC_HC_REG_DDR_CONFIG);

		rgmii_updatel(ethqos, SDCC_DDR_CONFIG_PRG_DLY_EN,

			      SDCC_DDR_CONFIG_PRG_DLY_EN,

			      SDCC_HC_REG_DDR_CONFIG);

		if (ethqos->emac_ver == EMAC_HW_v2_3_2_RG)

		if (ethqos->emac_ver == EMAC_HW_v2_3_2_RG ||

		    ethqos->emac_ver == EMAC_HW_v2_1_2)

			rgmii_updatel(ethqos, RGMII_CONFIG_LOOPBACK_EN,

				      0, RGMII_IO_MACRO_CONFIG);

		else
@@ -288,6 +296,7 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos) 
			      0, RGMII_IO_MACRO_CONFIG);

		rgmii_updatel(ethqos, RGMII_CONFIG_PROG_SWAP,

			      0, RGMII_IO_MACRO_CONFIG);

		if (ethqos->emac_ver != EMAC_HW_v2_1_2)

			rgmii_updatel(ethqos, RGMII_CONFIG2_DATA_DIVIDE_CLK_SEL,

				      0, RGMII_IO_MACRO_CONFIG2);

		rgmii_updatel(ethqos, RGMII_CONFIG2_TX_CLK_PHASE_SHIFT_EN,
@@ -297,7 +306,8 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos) 
			      BIT(6), RGMII_IO_MACRO_CONFIG);

		rgmii_updatel(ethqos, RGMII_CONFIG2_RSVD_CONFIG15,

			      0, RGMII_IO_MACRO_CONFIG2);

		if (ethqos->emac_ver == EMAC_HW_v2_3_2_RG)

		if (ethqos->emac_ver == EMAC_HW_v2_3_2_RG ||

		    ethqos->emac_ver == EMAC_HW_v2_1_2)

			rgmii_updatel(ethqos, RGMII_CONFIG2_RX_PROG_SWAP,

				      RGMII_CONFIG2_RX_PROG_SWAP,

				      RGMII_IO_MACRO_CONFIG2);
@@ -313,7 +323,8 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos) 
		rgmii_updatel(ethqos, SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY_EN,

			      SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY_EN,

			      SDCC_HC_REG_DDR_CONFIG);

		if (ethqos->emac_ver == EMAC_HW_v2_3_2_RG)

		if (ethqos->emac_ver == EMAC_HW_v2_3_2_RG ||

		    ethqos->emac_ver == EMAC_HW_v2_1_2)

			rgmii_updatel(ethqos, RGMII_CONFIG_LOOPBACK_EN,

				      0, RGMII_IO_MACRO_CONFIG);

		else
@@ -332,9 +343,11 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos) 
			      0, RGMII_IO_MACRO_CONFIG);

		rgmii_updatel(ethqos, RGMII_CONFIG_PROG_SWAP,

			      0, RGMII_IO_MACRO_CONFIG);

		if (ethqos->emac_ver != EMAC_HW_v2_1_2)

			rgmii_updatel(ethqos, RGMII_CONFIG2_DATA_DIVIDE_CLK_SEL,

				      0, RGMII_IO_MACRO_CONFIG2);

		if (ethqos->emac_ver == EMAC_HW_v2_3_2_RG)

		if (ethqos->emac_ver == EMAC_HW_v2_3_2_RG ||

		    ethqos->emac_ver == EMAC_HW_v2_1_2)

			rgmii_updatel(ethqos,

				      RGMII_CONFIG2_TX_CLK_PHASE_SHIFT_EN,

				      RGMII_CONFIG2_TX_CLK_PHASE_SHIFT_EN,
@@ -348,7 +361,8 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos) 
			      RGMII_IO_MACRO_CONFIG);

		rgmii_updatel(ethqos, RGMII_CONFIG2_RSVD_CONFIG15,

			      0, RGMII_IO_MACRO_CONFIG2);

		if (ethqos->emac_ver == EMAC_HW_v2_3_2_RG)

		if (ethqos->emac_ver == EMAC_HW_v2_3_2_RG ||

		    ethqos->emac_ver == EMAC_HW_v2_1_2)

			rgmii_updatel(ethqos, RGMII_CONFIG2_RX_PROG_SWAP,

				      RGMII_CONFIG2_RX_PROG_SWAP,

				      RGMII_IO_MACRO_CONFIG2);
@@ -364,7 +378,8 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos) 
		rgmii_updatel(ethqos, SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY_EN,

			      SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY_EN,

			      SDCC_HC_REG_DDR_CONFIG);

		if (ethqos->emac_ver == EMAC_HW_v2_3_2_RG)

		if (ethqos->emac_ver == EMAC_HW_v2_3_2_RG ||

		    ethqos->emac_ver == EMAC_HW_v2_1_2)

			rgmii_updatel(ethqos, RGMII_CONFIG_LOOPBACK_EN,

				      0, RGMII_IO_MACRO_CONFIG);

		else
@@ -514,15 +529,28 @@ static int qcom_ethqos_probe(struct platform_device *pdev) 
	plat_dat->pmt = 1;

	plat_dat->tso_en = of_property_read_bool(np, "snps,tso");



	if (of_property_read_bool(pdev->dev.of_node,

				  "emac-core-version")) {

		/* Read emac core version value from dtsi */

		ret = of_property_read_u32(pdev->dev.of_node,

					   "emac-core-version",

					   &ethqos->emac_ver);

		if (ret) {

			ETHQOSDBG(":resource emac-hw-ver! not in dtsi\n");

			ethqos->emac_ver = EMAC_HW_NONE;

			WARN_ON(1);

		}

	} else {

		ethqos->emac_ver =

		rgmii_readl(ethqos, EMAC_I0_EMAC_CORE_HW_VERSION_RGOFFADDR);

	}

	ETHQOSDBG(": emac_core_version = %d\n", ethqos->emac_ver);



	ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);

	if (ret)

		goto err_clk;



	ethqos->emac_ver = rgmii_readl(ethqos,

				       EMAC_I0_EMAC_CORE_HW_VERSION_RGOFFADDR);



	}

	rgmii_dump(ethqos);



	return ret;



err_clk:
@@ -553,6 +581,7 @@ static int qcom_ethqos_remove(struct platform_device *pdev) 
static const struct of_device_id qcom_ethqos_match[] = {

	{ .compatible = "qcom,qcs404-ethqos", .data = &emac_v2_3_0_por},

	{ .compatible = "qcom,sdxprairie-ethqos", .data = &emac_v2_3_2_por},

	{ .compatible = "qcom,stmmac-ethqos", },

	{ }

};

MODULE_DEVICE_TABLE(of, qcom_ethqos_match);
@@ -561,7 +590,7 @@ static struct platform_driver qcom_ethqos_driver = { 
	.probe  = qcom_ethqos_probe,

	.remove = qcom_ethqos_remove,

	.driver = {

		.name           = "qcom-ethqos",

		.name           = DRV_NAME,

		.pm		= &stmmac_pltfr_pm_ops,

		.of_match_table = of_match_ptr(qcom_ethqos_match),

	},

drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.h

+6 −0
Original line number Diff line number Diff line
@@ -19,6 +19,12 @@ 
#define SDC4_STATUS			0x14

#define SDCC_USR_CTL			0x18

#define RGMII_IO_MACRO_CONFIG2		0x1C

#define EMAC_HW_NONE 0

#define EMAC_HW_v2_1_1 0x20010001

#define EMAC_HW_v2_1_2 0x20010002

#define EMAC_HW_v2_3_0 0x20030000

#define EMAC_HW_v2_3_1 0x20030001

#define EMAC_HW_vMAX 9



struct ethqos_emac_por {

	unsigned int offset;