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Commit 84df0f25 authored by Camera Software Integration's avatar Camera Software Integration Committed by Gerrit - the friendly Code Review server
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Merge "msm: camera: cpas: Change to set OT value to 8 for RT block" into camera-kernel.lnx.4.0

parents f9f491b8 d3c7cff0
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+63 −0
Original line number Diff line number Diff line
@@ -289,6 +289,27 @@ static struct cam_camnoc_specific
			 */
			.enable = false,
		},
		.qosgen_mainctl = {
			.enable = true,
			.access_type = CAM_REG_TYPE_READ_WRITE,
			.masked_value = 0,
			.offset = 0x4808, /* IFE01234_RDI_QOSGEN_MAINCTL */
			.value = 0x2,
		},
		.qosgen_shaping_low = {
			.enable = true,
			.access_type = CAM_REG_TYPE_READ_WRITE,
			.masked_value = 0,
			.offset = 0x4820, /* IFE01234_RDI_QOSGEN_SHAPING_LOW */
			.value = 0x07070707,
		},
		.qosgen_shaping_high = {
			.enable = true,
			.access_type = CAM_REG_TYPE_READ_WRITE,
			.masked_value = 0,
			.offset = 0x4824, /* IFE01234_RDI_QOSGEN_SHAPING_HIGH */
			.value = 0x07070707,
		},
	},
	{
		.port_type = CAM_CAMNOC_IFE01_NRDI_WRITE,
@@ -343,6 +364,27 @@ static struct cam_camnoc_specific
			.offset = 0x3B88, /* IFE01_NRDI_ENCCTL_LOW */
			.value = 1,
		},
		.qosgen_mainctl = {
			.enable = true,
			.access_type = CAM_REG_TYPE_READ_WRITE,
			.masked_value = 0,
			.offset = 0x4708, /* IFE01_NRDI_QOSGEN_MAINCTL */
			.value = 0x2,
		},
		.qosgen_shaping_low = {
			.enable = true,
			.access_type = CAM_REG_TYPE_READ_WRITE,
			.masked_value = 0,
			.offset = 0x4720, /* IFE01_NRDI_QOSGEN_SHAPING_LOW */
			.value = 0x07070707,
		},
		.qosgen_shaping_high = {
			.enable = true,
			.access_type = CAM_REG_TYPE_READ_WRITE,
			.masked_value = 0,
			.offset = 0x4724, /* IFE01_NRDI_QOSGEN_SHAPING_HIGH */
			.value = 0x07070707,
		},
	},
	{
		.port_type = CAM_CAMNOC_IFE2_NRDI_WRITE,
@@ -397,6 +439,27 @@ static struct cam_camnoc_specific
			.offset = 0x5588, /* IFE2_NRDI_ENCCTL_LOW */
			.value = 0,
		},
		.qosgen_mainctl = {
			.enable = true,
			.access_type = CAM_REG_TYPE_READ_WRITE,
			.masked_value = 0,
			.offset = 0x5188, /* IFE2_NRDI_QOSGEN_MAINCTL */
			.value = 0x2,
		},
		.qosgen_shaping_low = {
			.enable = true,
			.access_type = CAM_REG_TYPE_READ_WRITE,
			.masked_value = 0,
			.offset = 0x51A0, /* IFE2_NRDI_QOSGEN_SHAPING_LOW */
			.value = 0x07070707,
		},
		.qosgen_shaping_high = {
			.enable = true,
			.access_type = CAM_REG_TYPE_READ_WRITE,
			.masked_value = 0,
			.offset = 0x51A4, /* IFE2_NRDI_QOSGEN_SHAPING_HIGH */
			.value = 0x07070707,
		},
	},
	{
		.port_type = CAM_CAMNOC_IPE_BPS_LRME_READ,